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    Dielectric waveguide filter with cross-coupling
    1.
    发明授权
    Dielectric waveguide filter with cross-coupling 失效
    具有交叉耦合的介质波导滤波器

    公开(公告)号：US07659799B2

    公开(公告)日：2010-02-09

    申请号：US11588176

    申请日：2006-10-25

    申请人： Dong Suk Jun ,  Kyoung Ik Cho ,  Hong Yeol Lee ,  Dong Young Kim ,  Sang Seok Lee

    发明人： Dong Suk Jun ,  Kyoung Ik Cho ,  Hong Yeol Lee ,  Dong Young Kim ,  Sang Seok Lee

    IPC分类号： H01P1/208

    CPC分类号： H01P1/2088

    摘要： Provided is a dielectric waveguide filter. The filter includes: a multi-layered structure of dielectric substrates having first and second ground planes at its top and bottom; first, second, and third waveguide resonators disposed at multiple layers within the multi-layered structure; converters for signal transition between input/output ports and the first and third waveguide resonators; first vias for forming the first, second, and third waveguide resonators; and second vias disposed at a boundary surface of the first waveguide resonator and the third waveguide resonator.

    摘要翻译： 提供了一种电介质波导滤波器。 该滤波器包括：绝缘基片的多层结构，其顶部和底部具有第一和第二接地平面; 设置在多层结构内的多层的第一，第二和第三波导谐振器; 转换器，用于输入/输出端口与第一和第三波导谐振器之间的信号转换; 用于形成第一，第二和第三波导谐振器的第一通孔; 以及设置在第一波导谐振器和第三波导谐振器的边界面处的第二通孔。

    Microstrip type bandpass filter
    2.
    发明授权
    Microstrip type bandpass filter 失效
    微带型带通滤波器

    公开(公告)号：US07369017B2

    公开(公告)日：2008-05-06

    申请号：US11136471

    申请日：2005-05-25

    申请人： Dong Suk Jun ,  Hong Yeol Lee ,  Dong Young Kim ,  Kyoung Ik Cho ,  Sang Seok Lee

    发明人： Dong Suk Jun ,  Hong Yeol Lee ,  Dong Young Kim ,  Kyoung Ik Cho ,  Sang Seok Lee

    IPC分类号： H01P1/20 ,  H01P3/08

    CPC分类号： H01P1/203

    摘要： A narrowband microstrip type bandpass filter adapted for a home network, telematics, an intelligent traffic system, and a satellite Internet, includes: an input terminal for receiving a predetermined signal; an output terminal for outputting a selection signal in a characteristic band; a first resonator electrically coupled with at least a portion of the input terminal; a second resonator electrically coupled with at least a portion of the first resonator; and a third resonator electrically coupled with at least a portion of the output terminal and the second resonator. A magnetic coupling is provided using a cross coupling gap or a cross coupling line between non-adjacent resonators, so that a pattern can be simplified by optimizing the design and the manufacturing process to provide low-cost millimeter-wave parts. The manufacturing cost can be reduced by miniaturizing the parts, and the mass production can be readily realized.

    摘要翻译： 适用于家庭网络，远程信息处理，智能交通系统和卫星互联网的窄带微带型带通滤波器包括：用于接收预定信号的输入端; 输出端子，用于输出特征频带中的选择信号; 与所述输入端子的至少一部分电耦合的第一谐振器; 与所述第一谐振器的至少一部分电耦合的第二谐振器; 以及与所述输出端子和所述第二谐振器的至少一部分电耦合的第三谐振器。 使用交叉耦合间隙或非相邻谐振器之间的交叉耦合线提供磁耦合，使得可以通过优化设计和制造工艺来简化图案以提供低成本的毫米波部分。 可以通过使部件小型化来降低制造成本，并且可以容易地实现批量生产。

    Memory cell and memory device using the same
    5.
    发明授权
    Memory cell and memory device using the same 有权
    内存单元和内存设备使用相同

    公开(公告)号：US08493768B2

    公开(公告)日：2013-07-23

    申请号：US13300688

    申请日：2011-11-21

    申请人： Chunwon Byun ,  ByeongHoon Kim ,  Sung Min Yoon ,  Shinhyuk Yang ,  Min Ki Ryu ,  Chi-Sun Hwang ,  Sang-Hee Park ,  Kyoung Ik Cho

    发明人： Chunwon Byun ,  ByeongHoon Kim ,  Sung Min Yoon ,  Shinhyuk Yang ,  Min Ki Ryu ,  Chi-Sun Hwang ,  Sang-Hee Park ,  Kyoung Ik Cho

    IPC分类号： G11C11/22

    CPC分类号： G11C11/22

    摘要： Provided is a memory cell including: a ferroelectric transistor; a plurality of switching elements electrically connected to the ferroelectric transistor; and a plurality of control lines for transmitting individual control signals to each of the plurality of switching element for separately controlling the plurality of switching elements. The plurality of switching elements are configured to be separately controlled on the basis of the individual control signals so as to prevent each electrode of the ferroelectric transistor from being floated.

    摘要翻译： 提供一种存储单元，包括：铁电晶体管; 电连接到所述铁电晶体管的多个开关元件; 以及多个控制线，用于将各个控制信号发送到多个开关元件中的每一个，用于分别控制多个开关元件。 多个开关元件被配置为基于各个控制信号单独控制，以防止铁电晶体管的每个电极浮动。

    TRANSPARENT NONVOLATILE MEMORY THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    TRANSPARENT NONVOLATILE MEMORY THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 有权
    透明非易失性存储器薄膜晶体管及其制造方法

    公开(公告)号：US20120225500A1

    公开(公告)日：2012-09-06

    申请号：US13469558

    申请日：2012-05-11

    申请人： Sung Min YOON ,  Shin Hyuk Yang ,  Soon Won Jung ,  Seung Youl Kang ,  Doo Hee Cho ,  Chun Won Byun ,  Chi Sun Hwang ,  Byoung Gon Yu ,  Kyoung Ik Cho

    发明人： Sung Min YOON ,  Shin Hyuk Yang ,  Soon Won Jung ,  Seung Youl Kang ,  Doo Hee Cho ,  Chun Won Byun ,  Chi Sun Hwang ,  Byoung Gon Yu ,  Kyoung Ik Cho

    IPC分类号： H01L51/40

    CPC分类号： H01L21/28291 ,  H01L29/78391 ,  H01L29/7869

    摘要： Provided are a transparent nonvolatile memory thin film transistor (TFT) and a method of manufacturing the same. The memory TFT includes source and drain electrodes disposed on a transparent substrate. A transparent semiconductor thin layer is disposed on the source and drain electrodes and the transparent substrate interposed between the source and drain electrodes. An organic ferroelectric thin layer is disposed on the transparent semiconductor thin layer. A gate electrode is disposed on the organic ferroelectric thin layer in alignment with the transparent semiconductor thin layer. Thus, the transparent nonvolatile memory TFT employs the organic ferroelectric thin layer, the oxide semiconductor thin layer, and auxiliary insulating layers disposed above and below the organic ferroelectric thin layer, thereby enabling low-cost manufacture of a transparent nonvolatile memory device capable of a low-temperature process.

    摘要翻译： 提供了一种透明非易失性存储器薄膜晶体管（TFT）及其制造方法。 存储TFT包括设置在透明基板上的源极和漏极。 透明半导体薄层设置在源电极和漏电极之间，并且透明基板设置在源极和漏极之间。 有机铁电薄层设置在透明半导体薄层上。 栅电极与透明半导体薄层对准地设置在有机铁电薄层上。 因此，透明非易失性存储器TFT采用有机铁电薄层，氧化物半导体薄层和设置在有机铁电薄层之上和之下的辅助绝缘层，从而能够低成本地制造能够低的透明非易失性存储器件 温度过程。

    Transparent nonvolatile memory thin film transistor and method of manufacturing the same
    7.
    发明授权
    Transparent nonvolatile memory thin film transistor and method of manufacturing the same 有权
    透明非易失性存储薄膜晶体管及其制造方法

    公开(公告)号：US08198625B2

    公开(公告)日：2012-06-12

    申请号：US12555986

    申请日：2009-09-09

    申请人： Sung Min Yoon ,  Shin Hyuk Yang ,  Soon Won Jung ,  Seung Youl Kang ,  Doo Hee Cho ,  Chun Won Byun ,  Chi Sun Hwang ,  Byoung Gon Yu ,  Kyoung Ik Cho

    发明人： Sung Min Yoon ,  Shin Hyuk Yang ,  Soon Won Jung ,  Seung Youl Kang ,  Doo Hee Cho ,  Chun Won Byun ,  Chi Sun Hwang ,  Byoung Gon Yu ,  Kyoung Ik Cho

    IPC分类号： H01L35/24

    CPC分类号： H01L21/28291 ,  H01L29/78391 ,  H01L29/7869

    摘要： Provided are a transparent nonvolatile memory thin film transistor (TFT) and a method of manufacturing the same. The memory TFT includes source and drain electrodes disposed on a transparent substrate. A transparent semiconductor thin layer is disposed on the source and drain electrodes and the transparent substrate interposed between the source and drain electrodes. An organic ferroelectric thin layer is disposed on the transparent semiconductor thin layer. A gate electrode is disposed on the organic ferroelectric thin layer in alignment with the transparent semiconductor thin layer. Thus, the transparent nonvolatile memory TFT employs the organic ferroelectric thin layer, the oxide semiconductor thin layer, and auxiliary insulating layers disposed above and below the organic ferroelectric thin layer, thereby enabling low-cost manufacture of a transparent nonvolatile memory device capable of a low-temperature process.

    摘要翻译： 提供了一种透明非易失性存储器薄膜晶体管（TFT）及其制造方法。 存储TFT包括设置在透明基板上的源极和漏极。 透明半导体薄层设置在源电极和漏电极之间，并且透明基板设置在源极和漏极之间。 有机铁电薄层设置在透明半导体薄层上。 栅电极与透明半导体薄层对准地设置在有机铁电薄层上。 因此，透明非易失性存储器TFT采用有机铁电薄层，氧化物半导体薄层和设置在有机铁电薄层之上和之下的辅助绝缘层，从而能够低成本地制造能够低的透明非易失性存储器件 温度过程。

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    8.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20110266542A1

    公开(公告)日：2011-11-03

    申请号：US13094933

    申请日：2011-04-27

    申请人： Min Ki RYU ,  Sang Hee Park ,  Chi Sun Hwang ,  Kyoung Ik Cho

    发明人： Min Ki RYU ,  Sang Hee Park ,  Chi Sun Hwang ,  Kyoung Ik Cho

    IPC分类号： H01L29/04 ,  H01L21/336

    CPC分类号： H01L27/124 ,  H01L27/1225 ,  H01L29/78648

    摘要： Provided are a semiconductor device including a dual gate transistor and a method of fabricating the same. The semiconductor device includes a lower gate electrode, an upper gate electrode on the lower gate electrode, a contact plug interposed between the lower gate electrode and the upper gate electrode, and connecting the lower gate electrode to the upper gate electrode, and a functional electrode spaced apart from the upper gate electrode and formed at the same height as the upper gate electrode. The dual gate transistor exhibiting high field effect mobility is applied to the semiconductor device, so that characteristics of the semiconductor device can be improved. In particular, since no additional mask or deposition process is necessary, a large-area high-definition semiconductor device can be mass-produced with neither an increase in process cost nor a decrease in yield.

    摘要翻译： 提供一种包括双栅晶体管的半导体器件及其制造方法。 半导体器件包括下栅极电极，下栅电极上的上栅电极，插入在下栅电极和上栅电极之间的接触插塞，并将下栅电极连接到上栅电极，功能电极 与上栅电极间隔开并形成与上栅电极相同的高度。 表现出高场效应迁移率的双栅极晶体管被施加到半导体器件，从而可以提高半导体器件的特性。 特别是，由于不需要附加的掩模或沉积工艺，所以大面积的高分辨率半导体器件既可以增加工艺成本也不会降低产量。

    TRANSFERRED THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME
    9.
    发明申请
    TRANSFERRED THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME 有权
    转印薄膜晶体管及其制造方法

    公开(公告)号：US20110133257A1

    公开(公告)日：2011-06-09

    申请号：US12782303

    申请日：2010-05-18

    申请人： Jae Bon KOO ,  Jong-Hyun Ahn ,  Seung Youl Kang ,  Hasan Musarrat ,  In-Kyu You ,  Kyoung Ik Cho

    发明人： Jae Bon KOO ,  Jong-Hyun Ahn ,  Seung Youl Kang ,  Hasan Musarrat ,  In-Kyu You ,  Kyoung Ik Cho

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L27/1266 ,  H01L27/1214 ,  H01L27/1218 ,  H01L29/78603

    摘要： Provided are a transferred thin film transistor and a method of manufacturing the same. The method includes: forming a source region and a drain region that extend in a first direction in a first substrate and a channel region between the source region and the drain region; forming trenches that extend in a second direction in the first substrate to define an active layer between the trenches, the second direction intersecting the first direction; separating the active layer between the trenches from the first substrate by performing an anisotropic etching process on the first substrate inside the trenches; attaching the active layer on a second substrate; and forming a gate electrode in the first direction on the channel region of the active layer.

    摘要翻译： 提供了一种转移的薄膜晶体管及其制造方法。 该方法包括：形成在第一衬底中沿第一方向延伸的源极区域和漏极区域以及源极区域和漏极区域之间的沟道区域; 形成在所述第一衬底中沿第二方向延伸的沟槽，以在所述沟槽之间限定有源层，所述第二方向与所述第一方向相交; 通过在所述沟槽内的所述第一衬底上进行各向异性蚀刻工艺，从所述第一衬底分离所述沟槽之间的有源层; 将活性层附着在第二基底上; 以及在有源层的沟道区上沿第一方向形成栅电极。

    NMOS device, PMOS device, and SiGe HBT device formed on SOI substrate and method of fabricating the same
    10.
    发明授权
    NMOS device, PMOS device, and SiGe HBT device formed on SOI substrate and method of fabricating the same 有权
    NMOS器件，PMOS器件和SOI衬底上形成的SiGe HBT器件及其制造方法

    公开(公告)号：US07943995B2

    公开(公告)日：2011-05-17

    申请号：US12068161

    申请日：2008-02-04

    申请人： Jin Yeong Kang ,  Seung Yun Lee ,  Kyoung Ik Cho

    发明人： Jin Yeong Kang ,  Seung Yun Lee ,  Kyoung Ik Cho

    IPC分类号： H01L27/01 ,  H01L27/12 ,  H01L31/0392

    CPC分类号： H01L29/66242 ,  H01L21/84 ,  H01L27/1203

    摘要： Provided are an NMOS device, a PMOS device and a SiGe HBT device which are implemented on an SOI substrate and a method of fabricating the same. In manufacturing a Si-based high speed device, a SiGe HBT and a CMOS are mounted on a single SOI substrate. In particular, a source and a drain of the CMOS are formed of SiGe and metal, and thus leakage current is prevented and low power consumption is achieved. Also, heat generation in a chip is suppressed, and a wide operation range may be obtained even at a low voltage.

    摘要翻译： 提供了在SOI衬底上实现的NMOS器件，PMOS器件和SiGe HBT器件及其制造方法。 在制造Si基高速器件时，SiGe HBT和CMOS安装在单个SOI衬底上。 特别地，CMOS的源极和漏极由SiGe和金属形成，因此防止漏电流并实现低功耗。 此外，芯片中的发热被抑制，即使在低电压下也可以获得宽的工作范围。