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    Method of manufacturing thin film transistor and thin film transistor substrate
    2.
    发明授权
    Method of manufacturing thin film transistor and thin film transistor substrate 有权
    制造薄膜晶体管和薄膜晶体管基板的方法

    公开(公告)号：US08378421B2

    公开(公告)日：2013-02-19

    申请号：US13350037

    申请日：2012-01-13

    申请人： Jae Bon Koo ,  In-Kyu You ,  Seongdeok Ahn ,  Kyoung Ik Cho

    发明人： Jae Bon Koo ,  In-Kyu You ,  Seongdeok Ahn ,  Kyoung Ik Cho

    IPC分类号： H01L27/12

    CPC分类号： H01L29/78603 ,  H01L27/1266 ,  H01L29/66757 ,  H01L29/78618

    摘要： A thin film transistor substrate. The thin film transistor substrate includes a substrate, an adhesive layer on the substrate, and a semiconductor layer having a first doped region, a second doped region and a channel region on the adhesive layer. The thin film transistor substrate further includes a first dielectric layer on the semiconductor layer, a gate electrode overlapping the channel region, a second dielectric layer on the first dielectric layer and the gate electrode, a source electrode disposed on the second insulating layer, and a drain electrode spaced apart from the source electrode on the source electrode. The channel region is disposed between the first doped region and the second doped region, and has a transmittance higher than those of the first doped region and the second doped region.

    摘要翻译： 薄膜晶体管基板。 薄膜晶体管衬底包括衬底，衬底上的粘合剂层，以及在粘合剂层上具有第一掺杂区域，第二掺杂区域和沟道区域的半导体层。 薄膜晶体管基板还包括半导体层上的第一介电层，与沟道区重叠的栅极电极，第一介电层上的第二电介质层和栅极电极，设置在第二绝缘层上的源电极和 漏电极与源电极上的源电极间隔开。 沟道区域设置在第一掺杂区域和第二掺杂区域之间，并且具有高于第一掺杂区域和第二掺杂区域的透射率的透射率。

    Method of manufacturing thin film transistor and thin film transistor substrate
    3.
    发明授权
    Method of manufacturing thin film transistor and thin film transistor substrate 有权
    制造薄膜晶体管和薄膜晶体管基板的方法

    公开(公告)号：US08119463B2

    公开(公告)日：2012-02-21

    申请号：US12507725

    申请日：2009-07-22

    申请人： Jae Bon Koo ,  In-Kyu You ,  Seongdeok Ahn ,  Kyoung Ik Cho

    发明人： Jae Bon Koo ,  In-Kyu You ,  Seongdeok Ahn ,  Kyoung Ik Cho

    IPC分类号： H01L21/00 ,  H01L21/84

    CPC分类号： H01L29/78603 ,  H01L27/1266 ,  H01L29/66757 ,  H01L29/78618

    摘要： Provided is a method of manufacturing a thin film transistor that can improve self-alignment. In this method, a semiconductor layer comprising a first doped region, a second doped region and a channel region is formed on a sacrificial layer on a first substrate. Next, the semiconductor layer is separated from the first substrate and is then coupled on a second substrate. Next, a dielectric layer is formed on the second substrate and the semiconductor layer, and a first photoresist layer is formed on the dielectric layer. Thereafter, the first photoresist layer is exposed to light from a rear surface of the second substrate by using the first doped region and the second doped region as a mask, to form a first mask pattern. Next, a gate electrode overlapping the channel region is formed on the dielectric layer by using the first mask pattern as a mask, and a source electrode and a drain electrode connected to the first doped region and the second doped region, respectively are formed to complete a thin film transistor.

    摘要翻译： 提供了一种可以改善自对准的薄膜晶体管的制造方法。 在该方法中，在第一衬底上的牺牲层上形成包括第一掺杂区域，第二掺杂区域和沟道区域的半导体层。 接下来，半导体层与第一衬底分离，然后耦合在第二衬底上。 接下来，在第二基板和半导体层上形成电介质层，在电介质层上形成第一光致抗蚀剂层。 此后，通过使用第一掺杂区域和第二掺杂区域作为掩模，将第一光致抗蚀剂层从第二基板的后表面曝光，以形成第一掩模图案。 接下来，通过使用第一掩模图案作为掩模在介电层上形成与沟道区重叠的栅电极，分别形成连接到第一掺杂区和第二掺杂区的源电极和漏极，以完成 薄膜晶体管。

    Transferred thin film transistor and method for manufacturing the same
    4.
    发明授权
    Transferred thin film transistor and method for manufacturing the same 有权
    转移薄膜晶体管及其制造方法

    公开(公告)号：US08404532B2

    公开(公告)日：2013-03-26

    申请号：US12782303

    申请日：2010-05-18

    申请人： Jae Bon Koo ,  Jong-Hyun Ahn ,  Seung Youl Kang ,  Hasan Musarrat ,  In-Kyu You ,  Kyoung Ik Cho

    发明人： Jae Bon Koo ,  Jong-Hyun Ahn ,  Seung Youl Kang ,  Hasan Musarrat ,  In-Kyu You ,  Kyoung Ik Cho

    IPC分类号： H01L21/336

    CPC分类号： H01L27/1266 ,  H01L27/1214 ,  H01L27/1218 ,  H01L29/78603

    摘要： Provided are a transferred thin film transistor and a method of manufacturing the same. The method includes: forming a source region and a drain region that extend in a first direction in a first substrate and a channel region between the source region and the drain region; forming trenches that extend in a second direction in the first substrate to define an active layer between the trenches, the second direction intersecting the first direction; separating the active layer between the trenches from the first substrate by performing an anisotropic etching process on the first substrate inside the trenches; attaching the active layer on a second substrate; and forming a gate electrode in the first direction on the channel region of the active layer.

    摘要翻译： 提供了一种转移的薄膜晶体管及其制造方法。 该方法包括：形成在第一衬底中沿第一方向延伸的源极区域和漏极区域以及源极区域和漏极区域之间的沟道区域; 形成在所述第一衬底中沿第二方向延伸的沟槽，以在所述沟槽之间限定有源层，所述第二方向与所述第一方向相交; 通过在所述沟槽内的所述第一衬底上进行各向异性蚀刻工艺，从所述第一衬底分离所述沟槽之间的有源层; 将活性层附着在第二基底上; 以及在有源层的沟道区上沿第一方向形成栅电极。

    METHOD OF AND APPARATUS FOR FORMING A METAL PATTERN
    8.
    发明申请
    METHOD OF AND APPARATUS FOR FORMING A METAL PATTERN 审中-公开
    用于形成金属图案的方法和装置

    公开(公告)号：US20120141665A1

    公开(公告)日：2012-06-07

    申请号：US13309807

    申请日：2011-12-02

    申请人： Tae-Youb KIM ,  Kang-Jun Baeg ,  In-Kyu You ,  Minseok Kim ,  Jae Bon Koo

    发明人： Tae-Youb KIM ,  Kang-Jun Baeg ,  In-Kyu You ,  Minseok Kim ,  Jae Bon Koo

    IPC分类号： H05K3/02 ,  B05C5/00

    CPC分类号： B41F17/26 ,  B05C1/0808

    摘要： Provided are methods of and apparatuses for forming a metal pattern. In the method, an initiator and a metal pattern are sequentially combined on a previously-formed bonding agent pattern improving adhesion and/or junction properties between the substrate and the metal. The bonding agent pattern may be formed using a reverse offset printing method. The metal pattern may be formed using an electroless electrochemical plating method. The metal pattern can be formed with improved uniformity in thickness and planar area.

    摘要翻译： 提供了用于形成金属图案的方法和装置。 在该方法中，引发剂和金属图案依次组合在预先形成的粘合剂图案上，从而提高基材和金属之间的粘合性和/或结合性。 粘合剂图案可以使用反胶版印刷法形成。 金属图案可以使用无电镀电镀法形成。 可以形成具有改善的厚度均匀性和平坦面积的金属图案。

    Organic inverter including surface-treated layer and method of manufacturing the same
    10.
    发明授权
    Organic inverter including surface-treated layer and method of manufacturing the same 失效
    有机逆变器包括表面处理层及其制造方法

    公开(公告)号：US08039295B2

    公开(公告)日：2011-10-18

    申请号：US12906457

    申请日：2010-10-18

    申请人： Jae Bon Koo ,  Kyung Soo Suh ,  Seong Hyun Kim

    发明人： Jae Bon Koo ,  Kyung Soo Suh ,  Seong Hyun Kim

    IPC分类号： H01L51/40

    CPC分类号： H01L27/283 ,  H01L51/0545

    摘要： An organic inverter and a method of manufacturing the same are provided, which regulates threshold voltages depending on positions when an inverter circuit is manufactured on a substrate using an organic semiconductor. To form a depletion load transistor and an enhancement driver transistor at adjacent positions of the same substrate, the surface of the substrate is selectively treated by positions or selectively applied by self-assembly monolayer treatment. Thus, a D-inverter having a combination of a depletion mode and an enhancement mode is more easily realized than a conventional method using a transistor size effect. Also, the D-inverter can be realized even with the same W/L ratio, thereby increasing integration density. That is, the W/L ratio does not need to be increased to manufacture a depletion load transistor, thereby improving integration density.

    摘要翻译： 提供一种有机逆变器及其制造方法，其根据使用有机半导体在基板上制造逆变器电路时的位置来调节阈值电压。 为了在同一衬底的相邻位置处形成耗尽负载晶体管和增强驱动晶体管，衬底的表面通过位置选择性地处理或通过自组装单层处理选择性地施加。 因此，与使用晶体管尺寸效应的传统方法相比，更容易实现具有耗尽模式和增强模式的组合的D逆变器。 此外，即使以相同的W / L比率也能够实现D逆变器，从而提高集成密度。 也就是说，不需要增加W / L比来制造耗尽负载晶体管，从而提高集成密度。