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公开(公告)号：US06179207B2
公开(公告)日：2001-01-30
申请号：US08668049
申请日：1996-06-18
申请人： Douglas Craig Bossen , Chin-Long Chen , Fredrick Hayes Dill , Douglas Seymore Goodman , Mu-Yue Hsiao , Paul Vincent McCann , James Michael Mulligan , Ricky Allen Rand
发明人： Douglas Craig Bossen , Chin-Long Chen , Fredrick Hayes Dill , Douglas Seymore Goodman , Mu-Yue Hsiao , Paul Vincent McCann , James Michael Mulligan , Ricky Allen Rand
IPC分类号： G06K710
CPC分类号： G06K7/10861 , G06K1/126 , G06K7/0166 , G06K19/06028 , G06K2019/06253
摘要： A single width bar code exhibiting inherent self clocking characteristics is provided so as to be particularly useful in the identification of semiconductor wafers in very large scale integrated circuit manufacturing processes. The codes described herein are robust, reliable and highly readable even in the face of relatively high variations in scanning speed. The codes are also desirably dense in terms of character representations per linear centimeter, an important consideration in semiconductor manufacturing wherein space on the chips and the wafer is at a premium. Additionally, a preferred embodiment of the present invention exhibits a minimum number for the maximum number of spaces between adjacent bars in code symbol sequences.
摘要翻译： 提供了具有固有的自身时钟特性的单宽度条形码，以便在非常大规模的集成电路制造工艺中的半导体晶片的识别中特别有用。 即使面对相对高的扫描速度变化，这里描述的代码是鲁棒的，可靠的和高度可读的。 这些代码在每个线性厘米的字符表示方面也是令人满意的，这在半导体制造中是重要的考虑因素，其中芯片和晶片上的空间是非常重要的。 另外，本发明的一个优选实施例在代码符号序列中显示相邻条之间的最大空格数的最小数目。
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公开(公告)号：US06519736B1
公开(公告)日：2003-02-11
申请号：US09452079
申请日：1999-11-30
IPC分类号： G11C2900
CPC分类号： H03M13/11 , G06F11/1008 , H03M13/19
摘要： Uncorrectable errors are isolated to one component of a computing system comprising a plurality of components. First, upon detection of an uncorrectable error, a special check bit pattern is generated. This check bit pattern is used to indicate the occurrence of an uncorrectable error, as well as the location of the occurrence of the error. Subsequently, the check bit pattern is incorporated into the data word being transmitted, and thus may be used to isolate an uncorrectable error to the exact location of occurrence.
摘要翻译： 不可纠正的错误被隔离到包括多个组件的计算系统的一个组件。 首先，当检测到不可校正的错误时，产生特殊的校验位模式。 该检查位模式用于指示出现不可校正错误以及发生错误的位置。 随后，校验位模式被合并到被发送的数据字中，因此可以用于将不可校正的误差隔离到确切的发生位置。
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3.发明授权Single symbol correction double symbol detection code employing a modular H-matrix 有权采用模块化H矩阵的单符号校正双符号检测码公开(公告)号：US06463563B1
公开(公告)日：2002-10-08
申请号：US09451133
申请日：1999-11-30
IPC分类号： G11C2900
CPC分类号： G11C29/02
摘要： An error correction code for single symbol error correction and double symbol error detection is generated according to a novel modular H-matrix. The H-matrix utilizes a modular design with multiple iterations of a plurality of subsets. In particular, one example of this H-matrix includes a plurality of rows and columns with each of at least one row of the H-matrix comprising, in part, multiple iterations of one subset of the plurality of subsets. The remainder of the rows, comprises, in part, a cyclic permutation of all of the remaining subsets of the plurality of subsets.
摘要翻译： 根据新型模块化H矩阵生成单符号纠错和双符号错误检测的纠错码。 H矩阵利用具有多个子集的多次迭代的模块化设计。 特别地，该H矩阵的一个示例包括多个行和列，其中H矩阵的至少一行中的每一行部分地包括多个子集中的一个子集的多次迭代。 行的其余部分部分地包括多个子集中的所有剩余子集的循环排列。
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公开(公告)号：US06460157B1
公开(公告)日：2002-10-01
申请号：US09450548
申请日：1999-11-30
IPC分类号： H03M1300
CPC分类号： G06F11/1008 , G11B20/18
摘要： Data is protected during conversion from one or more source error correction codes to one or more destination error correction codes by generating check bits of the destination error correction codes prior to a detection for errors in the source error correction codes. After commencing generation of these check bits, a detection is made for any errors in the source error correction codes. These errors are subsequently corrected in the destination error correction codes by complementing the erroneous bits of the destination error correction code. In addition, various logic reduction techniques may also be implemented to increase efficiency.
摘要翻译： 数据在从一个或多个源纠错码到一个或多个目的地纠错码的转换期间通过在检测到源纠错码中的错误之前产生目的地纠错码的检查位来保护。 在开始生成这些校验位之后，检测源纠错码中的任何错误。 通过补充目的地纠错码的错误位，随后在目的地纠错码中校正这些误差。 此外，还可以实现各种逻辑降低技术以提高效率。
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公开(公告)号：US5552591A
公开(公告)日：1996-09-03
申请号：US21298
申请日：1993-02-22
申请人： Douglas C. Bossen , Chin-Long Chen , Frederick H. Dill , Douglas S. Goodman , Mu-Yue Hsiao , Paul V. McCann , James M. Mulligan , Ricky A. Rand
发明人： Douglas C. Bossen , Chin-Long Chen , Frederick H. Dill , Douglas S. Goodman , Mu-Yue Hsiao , Paul V. McCann , James M. Mulligan , Ricky A. Rand
CPC分类号： G06K7/10861 , G06K1/126 , G06K19/06028 , G06K7/0166 , G06K2019/06253
摘要： A single width bar code exhibiting inherent self clocking characteristics is provided so as to be particularly useful in the identification of semiconductor wafers in very large scale integrated circuit manufacturing processes. The codes described herein are robust, reliable and highly readable even in the face of relatively high variations in scanning speed. The codes are also desirably dense in terms of character representations per linear centimeter, an important consideration in semiconductor manufacturing wherein space on the chips and the wafer is at a premium. Additionally, a preferred embodiment of the present invention exhibits a minimum number for the maximum number of spaces between adjacent bars in code symbol sequences.
摘要翻译： 提供了具有固有的自身时钟特性的单宽度条形码，以便在非常大规模的集成电路制造工艺中的半导体晶片的识别中特别有用。 即使面对相对高的扫描速度变化，这里描述的代码是鲁棒的，可靠的和高度可读的。 这些代码在每个线性厘米的字符表示方面也是令人满意的，这在半导体制造中是重要的考虑因素，其中芯片和晶片上的空间是非常重要的。 另外，本发明的一个优选实施例在代码符号序列中显示相邻条之间的最大空格数的最小数目。
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6.发明授权Memory implemented error detection and correction code capable of detecting errors in fetching data from a wrong address 失效存储器实现的错误检测和纠错码能够检测从错误地址获取数据的错误
公开(公告)号：US5768294A
公开(公告)日：1998-06-16
申请号：US570448
申请日：1995-12-11
CPC分类号： G06F11/1016 , G06F11/1028 , H03M13/03
摘要： An apparatus and method is discussed using a parity check matrix in order to acheive correction and detection of errors particularly pertaining to detection data fetched from a wrong address. The code structure enhances utilization of chip reliability by encoding and decoding digital signals through the utilization of a parity check matrix and parity bits generated from system address bits of a computer system with k symbols and b bits per symbol.
摘要翻译： 使用奇偶校验矩阵来讨论使用奇偶校验矩阵的装置和方法，以便对来自错误地址的检测数据特别有关的错误进行矫正和检测。 代码结构通过利用奇偶校验矩阵和由每个符号k个符号和b位的计算机系统的系统地址位产生的奇偶校验位对数字信号进行编码和解码来提高芯片可靠性的利用率。
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7.发明授权Memory implemented error detection and correction code with address parity bits 失效存储器实现了具有地址奇偶校验位的错误检测和校正码
公开(公告)号：US5751745A
公开(公告)日：1998-05-12
申请号：US824098
申请日：1997-03-25
CPC分类号： G06F11/1016 , G06F11/1028
摘要： A method and apparatus for performing digital signal error detection through the use of a string of received incoming system address bits. The incoming address bits are divided into groups according to whether they contain a high value of "1" or a low value of "0". At least one address parity bit is then generated from each group and used in checking the integrity of data received.
摘要翻译： 一种用于通过使用一串接收到的进入系统地址位来执行数字信号错误检测的方法和装置。 输入地址位根据它们是否包含高值“1”或低值“0”分成组。 然后从每个组生成至少一个地址奇偶校验位，并用于检查接收到的数据的完整性。
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公开(公告)号：US5521709A
公开(公告)日：1996-05-28
申请号：US57357
申请日：1993-05-05
申请人： Douglas C. Bossen , Chin-Long Chen , Fuad E. Doany , Mu-Yue Hsiao , Ricky A. Rand , Ralf J. Terbruggen
发明人： Douglas C. Bossen , Chin-Long Chen , Fuad E. Doany , Mu-Yue Hsiao , Ricky A. Rand , Ralf J. Terbruggen
CPC分类号： G06K1/126 , G06K15/22 , Y10S235/90
摘要： A method and apparatus is provided for producing single width barcodes in a continuous, serpentine pattern. This pattern provides continuity of operation for laser marking instruments and thereby results in the formation of more uniform and higher quality barcode indicia. The use of a continuous serpentine pattern also increases the speed at which the code may be written onto a substrate. This marking method is particularly appropriate for use in marking a wide variety of materials including semiconductors, metals, plastics and ceramics.
摘要翻译： 提供了一种用于以连续的蛇形图案生产单个宽度条形码的方法和装置。 这种图案为激光打标仪器提供连续的操作，从而形成更均匀和更高质量的条形码标记。 使用连续的蛇形图案也增加了代码可以写入基板的速度。 该标记方法特别适用于标记各种材料，包括半导体，金属，塑料和陶瓷。
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公开(公告)号：US06457154B1
公开(公告)日：2002-09-24
申请号：US09451261
申请日：1999-11-30
IPC分类号： G11C2900
CPC分类号： G06F11/1016
摘要： Uncorrectable errors are detected during the transmission of a data word according to an error correction code. Then, any address faults are identified from among the detected uncorrectable errors. In addition, address faults as well as uncorrectable memory data failures are detected from among the detected uncorrectable errors. Furthermore, address parity bits are not required to be stored to memory.
摘要翻译： 根据纠错码在数据字的发送期间检测不正确的错误。 然后，从检测到的不可校正错误中识别任何地址故障。 此外，从检测到的不可校正错误中检测到地址故障以及不可校正的存储器数据故障。 此外，地址奇偶校验位不需要存储到存储器中。
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公开(公告)号：US5757823A
公开(公告)日：1998-05-26
申请号：US538691
申请日：1995-10-03
申请人： Chin-Long Chen , Mu-Yue Hsiao
发明人： Chin-Long Chen , Mu-Yue Hsiao
CPC分类号： G06F11/1028 , H03M13/151
摘要： Advantage is taken of the presence of identity submatrices in a parity check matrix to achieve correction of errors in a single symbol and detection of errors in a single symbol together with a single bit error in another symbol for use in computer memory systems. The code structure enhances utilization of chip real estate and specifically provides for the utilization of a (76,64) code which employs 19 chips per computer memory word as opposed to 20 chips per word.
摘要翻译： 优先考虑在奇偶校验矩阵中存在身份子矩阵以实现单个符号中的错误校正以及单个符号中的错误的检测以及用于计算机存储器系统的另一个符号中的单个位错误。 代码结构提高了芯片实体的利用率，并且具体地提供了利用（76,64）代码，每个计算机存储器字使用19个芯片，而不是每个字20个芯片。
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