摘要:
A parallel computer processor that performs L1 norm calculations includes a plurality of processing elements and a data pipeline which couples the processing elements. The data vectors for which the L1 norm is to be calculated are stored in storage lines of a cache memory. In operation each processing element accesses data in its private storage column in the cache memory and calculates a term signal. The term signals are added to form the resulting L1 norm.
摘要:
A method for operating a data processing system is provided. The method includes providing a first operand stored in a first register, providing a second operand stored in the register, providing a third operand stored in the register. The method further includes executing a first instruction, where executing the first instruction comprises: (1) retrieving the first operand, the second operand, and the third operand from the first register; (2) performing an operation using the first operand, the second operand, and the third operand to generate a bit exact result.
摘要:
A slip-form machine (220) for laying of a second concrete slab (120) of a sleeperless rail-bed including a locomotion mechanism (222, 232) adapted to provide axial translation of the machine along a first slab (110); a slip-form (370) adapted to receive concrete exiting a discharge port (336) via a rearward exit (340) and form an uncured second concrete slab (120) during the axial translation; and a height adjustment mechanism (360) operable to adjust a height of a cover (350) of a forward exit (338) with respect to the first concrete slab (110).
摘要:
A method for operating a data processing system is provided. The method includes providing a first operand stored in a first register, providing a second operand stored in the register, providing a third operand stored in the register. The method further includes executing a first instruction, where executing the first instruction comprises: (1) retrieving the first operand, the second operand, and the third operand from the first register; (2) performing an operation using the first operand, the second operand, and the third operand to generate a bit exact result.