公开(公告)号：US20090195482A1

公开(公告)日：2009-08-06

申请号：US12240296

申请日：2008-09-29

申请人： Eisaku MAEDA ,  Hiroshi ANDO ,  Naoki HISHIKAWA ,  Jinsaku KANEDA ,  Hiroki MATSUNAGA

发明人： Eisaku MAEDA ,  Hiroshi ANDO ,  Naoki HISHIKAWA ,  Jinsaku KANEDA ,  Hiroki MATSUNAGA

IPC分类号： G09G3/28

CPC分类号： G09G3/296 ,  G09G3/293 ,  G09G2310/0289 ,  G09G2310/066 ,  G09G2330/021 ,  G09G2330/025 ,  G09G2330/06

摘要： A PDP-driving semiconductor integrated circuit includes a plurality of PDP drivers each for converting an input signal into a high-voltage pulse having an amplitude greater than that of the input signal and outputting the high-voltage pulse. The PDP-driving semiconductor integrated circuit has a function of performing sequential operation in which the PDP drivers operate at different timings and sequentially output the high-voltage pulses and a function of performing simultaneous operation in which the PDP drivers operate at the same timing and output the high-voltage pulses at a time. In each of the sequential operation and the simultaneous operation, at least one of the speed of change in voltage level of the high-voltage pulse from a low level to a high level and the speed of change in voltage level of the high-voltage pulse from the high level to the low level is controlled.

摘要翻译： PDP驱动半导体集成电路包括多个PDP驱动器，每个PDP驱动器用于将输入信号转换成具有大于输入信号的幅度的高电压脉冲，并输出高电压脉冲。 PDP驱动半导体集成电路具有执行顺序操作的功能，其中PDP驱动器在不同的定时操作并且顺序地输出高电压脉冲和执行同步操作的功能，其中PDP驱动器在相同的定时和输出 一次高压脉冲。 在每个顺序操作和同时操作中，高电压脉冲从低电平到高电平的电压电平的变化速度和高电压脉冲的电压电平变化速度中的至少一个 从高层到低层都受到控制。

公开(公告)号：US20100214197A1

公开(公告)日：2010-08-26

申请号：US12574266

申请日：2009-10-06

申请人： Hiroki MATSUNAGA ,  Tomohiro EBIHARA

发明人： Hiroki MATSUNAGA ,  Tomohiro EBIHARA

IPC分类号： G09G3/28 ,  H03K3/00

CPC分类号： H03K19/018521 ,  G09G3/296 ,  G09G2300/0426 ,  G09G2310/0291 ,  G09G2330/04

摘要： In a row-electrode drive circuit of a PDP display device, an N-channel MOS low-side transistor of an output section is in an ON state while a light emission of a capacitive load is sustained. Now, if power to a driver section is lost due to, for example, a disconnection of a line from an external power supply to a low-voltage power terminal, this loss of power is detected by a detection section, and a current path via a parasitic diode of a P-channel MOS transistor, which has turned off, in the driver section to the low-voltage power terminal is interrupted. As a result, the N-channel MOS low-side transistor of the output section has the charged electric charge of the capacitive load stored in a parasitic capacity between its drain and gate, so maintains the ON state. Therefore, even when power to the driver section is lost due to, for example, a disconnection of the line while a light emission of the capacitive load is sustained, a case where the low-side transistor of the output section turns off and breaks down is prevented.

摘要翻译： 在PDP显示装置的行电极驱动电路中，输出部的N沟道MOS低侧晶体管处于导通状态，同时容纳负载的发光被维持。 现在，如果由于例如将线路与外部电源断开连接到低压电力端子而导致驱动器部分的电力损失，则该功率损失由检测部分检测，并且电流路径经由 在低压电源端子的驱动器部分中已经断开的P沟道MOS晶体管的寄生二极管被中断。 结果，输出部分的N沟道MOS低侧晶体管具有存储在其漏极和栅极之间的寄生电容中的电容负载的充电电荷，因此保持ON状态。 因此，即使当驱动器部分的电源由于例如在容纳负载的发光被维持而导致线路断开而损失时，输出部分的低侧晶体管截止并分解的情况也是如此 被阻止