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1.发明申请公开(公告)号：US20120111268A1
公开(公告)日：2012-05-10
申请号：US13257274
申请日：2010-07-27
CPC分类号： F16L45/00 , B05B5/0407 , B05B5/1616 , B05B5/1625 , B05B5/1666 , B05B5/1675 , B05B12/14 , B05B12/149 , B05B15/55 , F16L37/30 , Y10T137/598
摘要： In an electrostatic coating apparatus (1), an electrically conductive coating material is supplied through a coating material supplying path (11) to a coating gun (13) to which a high voltage is applied. The electrostatic coating apparatus (1) is provided with an insulating and separating valve (32) capable of electrically insulating and separating the coating material supplying path (11) into an application side in which the high voltage is applied and a non-application side. The insulating and separating valve (32) is provided with a female coupling member (32U) having a first connecting portion (54) and a male coupling member (32D) having a second connecting portion (64). A supplying hole (55) for supplying a cleaning fluid to the first connecting portion (54) and the second connecting portion (64) and a discharging hole (56) for discharging the cleaning fluid supplied to the first connecting portion and the second connecting portion are provided on one of the female coupling member (32U) disposed on the non-application side and the male coupling member (32D).
摘要翻译： 在静电涂布装置（1）中，将导电涂料通过涂料供给路径（11）供给到施加高电压的涂布枪（13）。 静电涂布装置（1）具有绝缘分离阀（32），其能够将涂料供给路径（11）电绝缘并分离到施加高电压的施加侧和非施加侧。 绝缘分离阀（32）设置有具有第一连接部分（54）和具有第二连接部分（64）的阳联接部件（32D）的阴联接部件（32U）。 用于向第一连接部分（54）和第二连接部分（64）提供清洁流体的供应孔（55）和用于排出供应到第一连接部分和第二连接部分的清洗流体的排放孔 设置在设置在非施加侧的阴连接构件（32U）和阳联接构件（32D）中的一个上。
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公开(公告)号：US08007872B2
公开(公告)日：2011-08-30
申请号：US12442604
申请日：2008-10-01
CPC分类号： B05B5/1625 , B05B5/1675
摘要： An electrostatic coating method in which a coating material cartridge is used. When a coating material feeding path (68, 88) is cleaned by a liquid fed from a coating material feeding unit (20), the liquid is fed from the coating material feeding unit to a storage part (13) and stored. The liquid in the storage part is then fed to a fluid chamber (83) inside a coating material cartridge (19) via a fluid circuit (10A). The liquid in the fluid chamber pushes out the electrically conductive coating material inside a coating material chamber (84) via a free piston (82), and the electrically conductive coating material is fed to a coating gun (14).
摘要翻译： 使用涂料筒的静电涂布方法。 当通过从涂料供给单元（20）供给的液体清洁涂料供给路径（68,88）时，将液体从涂料供给单元供给到储存部（13）并进行存储。 然后，储存部分中的液体经由流体回路（10A）送入涂料筒（19）内的流体室（83）。 流体室中的液体经由自由活塞（82）推出涂覆材料室（84）内的导电涂层材料，并且导电涂层材料被供给到喷枪（14）。
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公开(公告)号：US20090302347A1
公开(公告)日：2009-12-10
申请号：US11919504
申请日：2006-09-29
IPC分类号： H01L27/04 , H01L29/861
CPC分类号： H01L27/0207 , G09G3/296 , G09G2310/0289 , G09G2330/04 , H01L24/05 , H01L27/0251 , H01L27/0629 , H01L27/11803 , H01L2224/05554 , H01L2924/01004 , H01L2924/13055 , H01L2924/14 , H01L2924/19043 , H01L2924/3011 , H01L2924/3025
摘要： A semiconductor integrated circuit includes a plurality of circuit cells each including a pad on a semiconductor chip. Each of the circuit cells includes a high-side transistor, a level shift circuit, a low-side transistor, a pre-driver, and a pad. The high-side transistor and the low-side transistor are arranged to face each other with the pad interposed therebetween.
摘要翻译： 半导体集成电路包括多个电路单元，每个电路单元包括半导体芯片上的焊盘。 每个电路单元包括高侧晶体管，电平移位电路，低侧晶体管，预驱动器和焊盘。 高侧晶体管和低侧晶体管被布置成彼此面对，垫间插入其间。
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4.发明申请公开(公告)号：US20090195482A1
公开(公告)日：2009-08-06
申请号：US12240296
申请日：2008-09-29
IPC分类号： G09G3/28
CPC分类号： G09G3/296 , G09G3/293 , G09G2310/0289 , G09G2310/066 , G09G2330/021 , G09G2330/025 , G09G2330/06
摘要： A PDP-driving semiconductor integrated circuit includes a plurality of PDP drivers each for converting an input signal into a high-voltage pulse having an amplitude greater than that of the input signal and outputting the high-voltage pulse. The PDP-driving semiconductor integrated circuit has a function of performing sequential operation in which the PDP drivers operate at different timings and sequentially output the high-voltage pulses and a function of performing simultaneous operation in which the PDP drivers operate at the same timing and output the high-voltage pulses at a time. In each of the sequential operation and the simultaneous operation, at least one of the speed of change in voltage level of the high-voltage pulse from a low level to a high level and the speed of change in voltage level of the high-voltage pulse from the high level to the low level is controlled.
摘要翻译： PDP驱动半导体集成电路包括多个PDP驱动器，每个PDP驱动器用于将输入信号转换成具有大于输入信号的幅度的高电压脉冲，并输出高电压脉冲。 PDP驱动半导体集成电路具有执行顺序操作的功能，其中PDP驱动器在不同的定时操作并且顺序地输出高电压脉冲和执行同步操作的功能，其中PDP驱动器在相同的定时和输出 一次高压脉冲。 在每个顺序操作和同时操作中，高电压脉冲从低电平到高电平的电压电平的变化速度和高电压脉冲的电压电平变化速度中的至少一个 从高层到低层都受到控制。
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5.发明申请SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, PDP DRIVER, AND PLASMA DISPLAY PANEL 有权半导体集成电路器件，PDP驱动器和等离子体显示面板公开(公告)号：US20090108434A1
公开(公告)日：2009-04-30
申请号：US12067953
申请日：2007-03-22
IPC分类号： H01L23/48 , H01L23/488
CPC分类号： H01L24/06 , H01L23/50 , H01L24/48 , H01L24/49 , H01L2223/6611 , H01L2224/05554 , H01L2224/05599 , H01L2224/0603 , H01L2224/48091 , H01L2224/4813 , H01L2224/48227 , H01L2224/4911 , H01L2224/49111 , H01L2224/49113 , H01L2224/4917 , H01L2224/49175 , H01L2224/85399 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/19043 , H01L2924/3011 , H01L2224/45099 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： In a semiconductor integrated circuit device of the present invention, temperature increase of a bonding wire can be suppressed even when conductive leads are short-circuited with each other, and reliability of the semiconductor integrated circuit device is improved. The conductive leads of a resin package for supplying a power supply section of a semiconductor integrated circuit chip with power from an external power supply are connected with bonding pads of the semiconductor integrated circuit chip by a plurality of bonding wires. Furthermore, the conductive leads connected to a GND for supplying the power supply section of the semiconductor integrated circuit chip with a grounding potential are connected with the bonding pads of the semiconductor integrated circuit chip by a plurality of bonding wires.
摘要翻译： 在本发明的半导体集成电路器件中，即使导电线彼此短路，也可以抑制接合线的温度升高，提高半导体集成电路器件的可靠性。 用于向外部电源供电的半导体集成电路芯片的电源部分的树脂封装的导电引线通过多根接合线与半导体集成电路芯片的接合焊盘连接。 此外，连接到用于向半导体集成电路芯片的电源部分提供接地电位的GND的导电引线通过多个接合线与半导体集成电路芯片的接合焊盘连接。
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公开(公告)号：US20090045480A1
公开(公告)日：2009-02-19
申请号：US12094499
申请日：2006-11-07
IPC分类号： H01L27/02
CPC分类号： H01L27/0207 , H01L27/12
摘要： A semiconductor integrated circuit includes a plurality of circuit cells on a semiconductor chip. The plurality of circuit cells are formed along a first chip side of the semiconductor chip. Each of the plurality of circuit cells has a pad. The semiconductor integrated circuit further includes a high voltage potential interconnect formed over the plurality of circuit cells. The high voltage potential interconnect has a width expanding in a length direction from a center portion to end portions of the high voltage potential interconnect.
摘要翻译： 半导体集成电路包括半导体芯片上的多个电路单元。 多个电路单元沿半导体芯片的第一芯片侧形成。 多个电路单元中的每一个具有衬垫。 半导体集成电路还包括形成在多个电路单元上的高压电位互连。 高压电位互连具有从高压电位互连的中心部分到端部的长度方向上的宽度。
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公开(公告)号：US20080265972A1
公开(公告)日：2008-10-30
申请号：US12048787
申请日：2008-03-14
申请人： Emi Nakamura , Hiroki Matsunaga
发明人： Emi Nakamura , Hiroki Matsunaga
IPC分类号： H03L5/00
CPC分类号： H03K17/284 , H03K19/018521
摘要： An output circuit includes a high-side transistor, a low-side transistor, a gate protection circuit, a level shift circuit, and a pre-driver circuit. The level shift circuit interrupts a current path from an output terminal to the level shift circuit after a predetermined time has passed since the high-side transistor was switched OFF.
摘要翻译： 输出电路包括高侧晶体管，低侧晶体管，栅极保护电路，电平移位电路和预驱动电路。 电平移位电路在从高侧晶体管截止时经过预定时间后，中断从输出端到电平移位电路的电流路径。
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公开(公告)号：US20080246529A1
公开(公告)日：2008-10-09
申请号：US12048895
申请日：2008-03-14
IPC分类号： H03L5/00 , H03K19/094
CPC分类号： H03K3/35613
摘要： A semiconductor integrated circuit includes a high-side transistor, a low-side transistor, a level shift circuit for driving the high-side transistor, and a pre-driver circuit for driving the low-side transistor. A connection point of the high-side transistor and the low-side transistor serves as an output terminal. The level shift circuit has first and second N-type MOS transistors whose gates are driven by the pre-driver circuit. The semiconductor integrated circuit further includes a diode whose anode is connected to the drain of the first or second N-type MOS transistor to which the gate of the high-side transistor is not connected, and whose cathode is connected to the output terminal.
摘要翻译： 半导体集成电路包括高侧晶体管，低侧晶体管，用于驱动高侧晶体管的电平移位电路和用于驱动低侧晶体管的预驱动电路。 高侧晶体管和低侧晶体管的连接点用作输出端子。 电平移位电路具有第一和第二N型MOS晶体管，其栅极由预驱动器电路驱动。 半导体集成电路还包括其阳极连接到第一或第二N型MOS晶体管的漏极的二极管，高侧晶体管的栅极未连接到该漏极，并且其阴极连接到输出端子。
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公开(公告)号：US20080068368A1
公开(公告)日：2008-03-20
申请号：US11941240
申请日：2007-11-16
申请人： Masahiko Sasada , Hiroki Matsunaga , Masashi Inao , Hiroshi Ando , Jinsaku Kaneda , Eisaku Maeda , Akihiro Maejima
发明人： Masahiko Sasada , Hiroki Matsunaga , Masashi Inao , Hiroshi Ando , Jinsaku Kaneda , Eisaku Maeda , Akihiro Maejima
CPC分类号： G09G3/296 , G09G3/282 , G09G3/294 , G09G2300/0408 , G09G2310/0289 , G09G2330/04
摘要： The collector, emitter, and base of a bipolar transistor circuit are connected to a high side power supply terminal, the drain of a level shift transistor, and a floating power supply terminal, respectively. When a high side output transistor is on, the floating power supply terminal is at the potential of a high potential power supply terminal. The high side power supply terminal is at a potential higher than the potential of the floating power supply terminal by a constant voltage. Turning the level shift transistor on, its drain potential drops below the potential of the floating power supply terminal; The base current flows through the bipolar transistor circuit and the drain potential of the level shift transistor is clamped near the potential of the floating power supply terminal; The bipolar transistor circuit is turned on and its collector current supplies the drain current of the level shift transistor.
摘要翻译： 双极晶体管电路的集电极，发射极和基极分别连接到高侧电源端子，电平移位晶体管的漏极和浮动电源端子。 当高边输出晶体管导通时，浮动电源端子处于高电位电源端子的电位。 高侧电源端子通过恒定电压处于高于浮动电源端子的电位的电位。 开启电平移位晶体管时，其漏极电位降低到浮动电源端子的电位以下; 基极电流流过双极晶体管电路，电平移位晶体管的漏极电压钳位在浮动电源端子的电位附近; 双极晶体管电路导通，其集电极电流提供电平移位晶体管的漏极电流。
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公开(公告)号：US07129779B2
公开(公告)日：2006-10-31
申请号：US11048732
申请日：2005-02-03
申请人： Masashi Inao , Hiroki Matsunaga
发明人： Masashi Inao , Hiroki Matsunaga
IPC分类号： H03F1/00
CPC分类号： H01L29/73 , G05F3/30 , H01L27/0635 , H01L29/0619 , H01L29/0692
摘要： A band gap circuit using NPN transistors (10, 12) having collectors connected to a power source voltage is employed, and transistor active regions of the NPN transistors (10, 12) and semiconductor elements constituting other signal processing circuits are integrated in the same floating block (19) with high voltage resistance. As a result, a reference voltage circuit used in the signal processing circuit can be integrated in a compact manner.
摘要翻译： 使用具有连接到电源电压的集电极的NPN晶体管（10,12）的带隙电路，并且构成其他信号处理电路的NPN晶体管（10,12）和半导体元件的晶体管有源区域被集成在相同的浮置 块（19）具有高耐压性。 结果，可以以紧凑的方式集成在信号处理电路中使用的参考电压电路。
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