公开(公告)号：US07759987B2

公开(公告)日：2010-07-20

申请号：US12048895

申请日：2008-03-14

申请人： Naoki Hishikawa ,  Hiroki Matsunaga ,  Jinsaku Kaneda

发明人： Naoki Hishikawa ,  Hiroki Matsunaga ,  Jinsaku Kaneda

IPC分类号： H03B1/00

CPC分类号： H03K3/35613

摘要： A semiconductor integrated circuit includes a high-side transistor, a low-side transistor, a level shift circuit for driving the high-side transistor, and a pre-driver circuit for driving the low-side transistor. A connection point of the high-side transistor and the low-side transistor serves as an output terminal. The level shift circuit has first and second N-type MOS transistors whose gates are driven by the pre-driver circuit. The semiconductor integrated circuit further includes a diode whose anode is connected to the drain of the first or second N-type MOS transistor to which the gate of the high-side transistor is not connected, and whose cathode is connected to the output terminal.

摘要翻译： 半导体集成电路包括高侧晶体管，低侧晶体管，用于驱动高侧晶体管的电平移位电路和用于驱动低侧晶体管的预驱动电路。 高侧晶体管和低侧晶体管的连接点用作输出端子。 电平移位电路具有第一和第二N型MOS晶体管，其栅极由预驱动器电路驱动。 半导体集成电路还包括其阳极连接到第一或第二N型MOS晶体管的漏极的二极管，高侧晶体管的栅极未连接到该漏极，并且其阴极连接到输出端子。

公开(公告)号：US20090195482A1

公开(公告)日：2009-08-06

申请号：US12240296

申请日：2008-09-29

申请人： Eisaku MAEDA ,  Hiroshi ANDO ,  Naoki HISHIKAWA ,  Jinsaku KANEDA ,  Hiroki MATSUNAGA

发明人： Eisaku MAEDA ,  Hiroshi ANDO ,  Naoki HISHIKAWA ,  Jinsaku KANEDA ,  Hiroki MATSUNAGA

IPC分类号： G09G3/28

CPC分类号： G09G3/296 ,  G09G3/293 ,  G09G2310/0289 ,  G09G2310/066 ,  G09G2330/021 ,  G09G2330/025 ,  G09G2330/06

摘要： A PDP-driving semiconductor integrated circuit includes a plurality of PDP drivers each for converting an input signal into a high-voltage pulse having an amplitude greater than that of the input signal and outputting the high-voltage pulse. The PDP-driving semiconductor integrated circuit has a function of performing sequential operation in which the PDP drivers operate at different timings and sequentially output the high-voltage pulses and a function of performing simultaneous operation in which the PDP drivers operate at the same timing and output the high-voltage pulses at a time. In each of the sequential operation and the simultaneous operation, at least one of the speed of change in voltage level of the high-voltage pulse from a low level to a high level and the speed of change in voltage level of the high-voltage pulse from the high level to the low level is controlled.

摘要翻译： PDP驱动半导体集成电路包括多个PDP驱动器，每个PDP驱动器用于将输入信号转换成具有大于输入信号的幅度的高电压脉冲，并输出高电压脉冲。 PDP驱动半导体集成电路具有执行顺序操作的功能，其中PDP驱动器在不同的定时操作并且顺序地输出高电压脉冲和执行同步操作的功能，其中PDP驱动器在相同的定时和输出 一次高压脉冲。 在每个顺序操作和同时操作中，高电压脉冲从低电平到高电平的电压电平的变化速度和高电压脉冲的电压电平变化速度中的至少一个 从高层到低层都受到控制。

公开(公告)号：US20090045480A1

公开(公告)日：2009-02-19

申请号：US12094499

申请日：2006-11-07

申请人： Hiroki Matsunaga ,  Naoki Hishikawa ,  Akihiro Maejima ,  Jinsaku Kaneda ,  Hiroshi Ando

发明人： Hiroki Matsunaga ,  Naoki Hishikawa ,  Akihiro Maejima ,  Jinsaku Kaneda ,  Hiroshi Ando

IPC分类号： H01L27/02

CPC分类号： H01L27/0207 ,  H01L27/12

摘要： A semiconductor integrated circuit includes a plurality of circuit cells on a semiconductor chip. The plurality of circuit cells are formed along a first chip side of the semiconductor chip. Each of the plurality of circuit cells has a pad. The semiconductor integrated circuit further includes a high voltage potential interconnect formed over the plurality of circuit cells. The high voltage potential interconnect has a width expanding in a length direction from a center portion to end portions of the high voltage potential interconnect.

摘要翻译： 半导体集成电路包括半导体芯片上的多个电路单元。 多个电路单元沿半导体芯片的第一芯片侧形成。 多个电路单元中的每一个具有衬垫。 半导体集成电路还包括形成在多个电路单元上的高压电位互连。 高压电位互连具有从高压电位互连的中心部分到端部的长度方向上的宽度。

公开(公告)号：US20080246529A1

公开(公告)日：2008-10-09

申请号：US12048895

申请日：2008-03-14

申请人： Naoki Hishikawa ,  Hiroki Matsunaga ,  Jinsaku Kaneda

发明人： Naoki Hishikawa ,  Hiroki Matsunaga ,  Jinsaku Kaneda

IPC分类号： H03L5/00 ,  H03K19/094

CPC分类号： H03K3/35613

摘要： A semiconductor integrated circuit includes a high-side transistor, a low-side transistor, a level shift circuit for driving the high-side transistor, and a pre-driver circuit for driving the low-side transistor. A connection point of the high-side transistor and the low-side transistor serves as an output terminal. The level shift circuit has first and second N-type MOS transistors whose gates are driven by the pre-driver circuit. The semiconductor integrated circuit further includes a diode whose anode is connected to the drain of the first or second N-type MOS transistor to which the gate of the high-side transistor is not connected, and whose cathode is connected to the output terminal.

摘要翻译： 半导体集成电路包括高侧晶体管，低侧晶体管，用于驱动高侧晶体管的电平移位电路和用于驱动低侧晶体管的预驱动电路。 高侧晶体管和低侧晶体管的连接点用作输出端子。 电平移位电路具有第一和第二N型MOS晶体管，其栅极由预驱动器电路驱动。 半导体集成电路还包括其阳极连接到第一或第二N型MOS晶体管的漏极的二极管，高侧晶体管的栅极未连接到该漏极，并且其阴极连接到输出端子。