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    MOS(METAL OXIDE SILICON) CONTROLLED THYRISTOR DEVICE
    1.
    发明申请
    MOS(METAL OXIDE SILICON) CONTROLLED THYRISTOR DEVICE 有权

    公开(公告)号：US20230087416A1

    公开(公告)日：2023-03-23

    申请号：US17792070

    申请日：2021-06-10

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Kun Sik PARK ,  Jong II WON ,  Doo Hyung CHO ,  Dong Yun JUNG ,  Hyun GYu Jang

    IPC: H01L29/745 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66

    Abstract: A MOS controlled thyristor device according to the concept of the present invention includes a substrate comprising a first surface and a second surface, which face each other, gate patterns disposed on the first surface, a cathode electrode configured to cover the gate patterns, and an anode electrode disposed on the second surface, The substrate includes a lower emitter layer having a first conductive type, a lower base layer having a second conductive type on the lower emitter layer, an upper base region provided in an upper portion of the lower emitter layer and having a first conductive type, wherein the upper base region is configured to expose a portion of a top surface of the lower base layer, an upper emitter region having a second conductive type and provided in an upper portion of the upper base region, a first doped region having a first conductive type and a second doped region surrounded by the first doped region and having a second conductive type, wherein the first and second doped regions are provided in an upper portion of the upper emitter region, and a first doping pattern having a first conductive type, which is provided on one surface of the upper portion of the upper emitter region. The first doping pattern is interposed between the upper base region and the first doped region along a first direction parallel to the top surface of the substrate. The first doping pattern is configured to expose a top surface of the upper emitter region on the other surface of the upper portion of the upper emitter region. Each of the gate patterns is configured to cover portions of an exposed top surface of the lower base layer, an exposed top surface of the upper base layer, an exposed top surface of the upper emitter region, a top surface of the first doping pattern, and a top surface of the first doped region. The cathode electrode is configured to cover portions of top and side surfaces of the gate pattern, a top surface of the second doped region, and a top surface of the first doped region. The first conductive type and the second conductive type are different from each other.

    SCHOTTKY DIODE
    3.
    发明申请
    SCHOTTKY DIODE 审中-公开
    肖特基二极管

    公开(公告)号：US20160284872A1

    公开(公告)日：2016-09-29

    申请号：US15080338

    申请日：2016-03-24

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Kun Sik PARK ,  Jong II WON ,  Doo Hyung CHO

    IPC: H01L29/872 ,  H01L29/16 ,  H01L29/06

    CPC classification number: H01L29/872 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/402 ,  H01L29/417 ,  H01L29/6606

    Abstract: Provided is a Schottky diode including a substrate, a drift layer on the substrate, the drift layer comprising an active region and a periphery positioned at an edge of the active region, a junction termination layer on a boundary between the active region and the periphery, a first metal layer configured to cover a part of the active region and a part of the junction termination layer, and a second metal layer configured to cover the first metal layer and the active region, wherein the first metal layer and the second metal layer contact the drift layer to provide a Schottky junction, and the first metal layer has a higher Schottky barrier height than the second metal layer.

    Abstract translation: 提供了一种肖特基二极管，其包括衬底，衬底上的漂移层，漂移层包括有源区和位于有源区的边缘处的周边，活性区和周边之间的边界上的结终端层， 第一金属层，其被配置为覆盖所述有源区的一部分和所述结终端层的一部分;以及第二金属层，被配置为覆盖所述第一金属层和所述有源区，其中所述第一金属层和所述第二金属层接触 所述漂移层提供肖特基结，并且所述第一金属层具有比所述第二金属层更高的肖特基势垒高度。

    SEMICONDUCTOR RECTIFIER DEVICE
    4.
    发明申请
    SEMICONDUCTOR RECTIFIER DEVICE 审中-公开
    半导体整流器器件

    公开(公告)号：US20140197449A1

    公开(公告)日：2014-07-17

    申请号：US14155232

    申请日：2014-01-14

    Applicant: Electronics and Telecommunications Research Institute

    Inventor： Kunsik PARK ,  Kyoung IL NA ,  JIN-GUN KOO ,  Jin Ho LEE ,  Jong II WON

    IPC: H01L29/747

    CPC classification number: H01L29/861 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/4238

    Abstract: Provided is a semiconductor rectifier device. The semiconductor rectifier device may include a substrate doped with a first conductive type, a second electrode provided on a bottom surface of the substrate, an active region and a field region defined on the substrate, a gate provided in the active region, a gate insulating film provided between the gate and the substrate, body regions provided on the substrate adjacent to first and second sides of the gate, facing each other, and doped with a second conductive type dopant different from the first conductive type, and a second conductive type plug region formed on the substrate adjacent to third and fourth sides of the gate, connecting the first and second sides.

    Abstract translation: 提供了一种半导体整流器件。 半导体整流器件可以包括掺杂有第一导电类型的衬底，设置在衬底的底表面上的第二电极，在衬底上限定的有源区和场区，设置在有源区中的栅极，栅极绝缘 提供在所述栅极和所述基板之间的薄膜，设置在所述基板上的与所述栅极的第一和第二侧相邻的主体区域，彼此面对，并且掺杂有不同于所述第一导电类型的第二导电型掺杂物;以及第二导电型插塞 区域，形成在与栅极的第三和第四侧相邻的衬底上，连接第一和第二面。

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