摘要:
A pairing and indexing system for a garment pair. The pairing and indexing system includes a garment pair and a fastener. The garment pair has at least one characteristic. The fastener is attached to the garment pair, replaceably attaches the garment pair to each other for pairing so as to prevent loss of either of the garment pair due to separation from one another, an inconsistent pairing of the garment pair of a similar type, etc., and has at least one attribute. Each of the at least one attribute of the fastener has a predetermined correlation to a respective one of the at least one characteristic of the garment pair.
摘要:
A method of fabricating an enhancement mode semiconductor device comprises providing a compound semiconductor substrate, epitaxially growing on the substrate a first portion of a buffer, the first portion including gallium arsenide (GaAs), growing a second portion of the buffer, the second portion including a high V/III ratio and high aluminum (Al) mole fraction aluminum gallium arsenide (AlGaAs), and epitaxially growing a stack of compound semiconductor layers on the buffer. An enhancement mode semiconductor device is then formed in the stack.
摘要:
Methods and apparatus are provided for RF switches (504, 612) integrated in a monolithic RF transceiver IC (500) and switched gain amplifier (600). Multi-gate n-channel enhancement mode FETs (50, 112, 114, Q1-3, Q4-6) are used with single gate FETs (150), resistors (Rb, Rg, Re, R1-R17) and capacitors (C1-C3) formed by the same manufacturing process. The multiple gates (68) of the FETs (50, 112, 114, Q1-3, Q4-6) are parallel coupled, spaced-apart and serially arranged between source (72) and drain (76). When used in pairs (112, 114) to form a switch (504) for a transceiver (500) each FET has its source (74) coupled to an antenna RF I/O port (116, 501) and drains coupled respectively to second and third RF I/O ports (118, 120; 507, 521) leading to the receiver side (530) or transmitter side (532) of the transceiver (500). The gates (136, 138) are coupled to control ports (122, 124; 503, 505; 606, 608). When used in pairs (Q1-3, Q4-6) to form a variable switched attenuator, the first FET (Q1-3) is a pass device and the second FET (Q4-6) is a shunt device that respectively bridge two series resistors (R1, R2) and block a shunt resistor (R3) of a T-type attenuator.
摘要:
A method of assaying for animals having a high innate immunity level by assessing the total white blood cell count of the mammal or at least one of the mammal's parents and/or the acute phase protein level of the mammal or at least one of its parents. Alternatively, genetic markers indicative of these values may be used. The values obtained are compared to equivalent measurements from other mammals of the same breed. Values higher than mean equivalent measurements from mammals of the same breed indicate a high innate immunity level which is associated with a high performance.
摘要:
Methods and apparatus are provided for RF switches (100, 200). In a preferred embodiment, the apparatus comprises one or more multi-gate n-channel enhancement mode FET transistors (50, 112, 114). When used in pairs (112, 114) each has its source (74, 133) coupled to a first common RF I/O port (116) and drains coupled respectively to second and third RF I/O ports (118, 120), and gates (136, 138), coupled respectively to first and second control terminals (122, 124). The multi-gate regions (66, 68) of the FETs (50) are parallel coupled, spaced-apart and serially arranged between source (72) and drain (76). Lightly doped n-regions (Ldd, Lds) are provided serially arranged between the spaced-apart multi-gate regions (66, 68), the lightly doped n-regions (Ldd, Lds) being separated by more heavily doped n-regions (84). Bias resistances (132, 134) are provided between the sources (72, 133) and control terminals (122, 124) so as to provide a DC path between the control terminals (122, 124) that maintains the source (72, 133) voltage at the proper bias potential for enhancement mode operation.
摘要翻译:提供了用于RF开关(100,200)的方法和装置。 在优选实施例中,该装置包括一个或多个多栅极n沟道增强型FET晶体管(50,112,114)。 当成对使用时,每个都具有耦合到第一公共RF I / O端口(116)的源极(74,133)和分别耦合到第二和第三RF I / O端口(118,120)的漏极, 和分别耦合到第一和第二控制端(122,124)的门(136,138)。 FET(50)的多栅极区域(66,68)平行耦合,间隔开并且串联地布置在源极(72)和漏极(76)之间。 轻度掺杂的n区(Ldd,Lds)被串行地布置在间隔开的多栅极区(66,68)之间,轻掺杂的n-区(Ldd,Lds)被更重掺杂的n区分离( 84)。 偏置电阻(132,134)设置在源极(72,133)和控制端子(122,124)之间,以便在维持源极(72,133)和控制端子(122,124)之间提供DC路径, 电压处于适当的偏置电位,用于增强模式操作。
摘要:
A self-righting floatation seat for an infant that includes a body holding the infant and a harness detachably attached to the body. The body includes a lower portion receiving the infant, a handle extending upwardly from the lower portion, and a canopy detachably attached to the handle and the lower portion by a pair of quick disconnect clips and shields the head of the infant. The lower portion has an inner floor so configured so as to allow the infant to be in a reclining position, is separated from the lower portion by floatation foam, and has a plurality of perches extending upwardly therefrom to which the harness is attached. The lower portion has a pair drain holes in which a pair of check valves are disposed. The harness is a five-point harness including a pair of shoulder straps, a crotch strap, and a pair of waist straps.