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公开(公告)号:US20040163964A1
公开(公告)日:2004-08-26
申请号:US10370529
申请日:2003-02-24
IPC分类号: C25D005/02
CPC分类号: H05K3/4644 , H05K1/112 , H05K3/423 , H05K3/4614 , H05K2201/0355 , H05K2201/0394 , H05K2201/096 , H05K2201/10378 , H05K2203/061 , H05K2203/0733
摘要: A method of making a circuitized substrate in which a commoning layer is used to form multiple, substantially vertically aligned conductive openings in a multilayered component such as a laminate interposer for coupling a chip to a printed circuit board or the like. The structure, including such a chip and circuit board is ideally suited for use within an information handling system.
摘要翻译: 一种制造电路化基板的方法,其中共用层在诸如用于将芯片耦合到印刷电路板等的层叠插入件的多层部件中形成多个基本上垂直排列的导电开口。 包括这种芯片和电路板的结构非常适合在信息处理系统中使用。