公开(公告)号：US11950363B2

公开(公告)日：2024-04-02

申请号：US17542977

申请日：2021-12-06

Applicant: DexCom, Inc.

Inventor： Sean Frick ,  Louis Jung ,  David Lari

IPC: H05K1/09 ,  A61B5/00 ,  A61B5/1468 ,  A61B5/1495 ,  A61B5/24 ,  H01L21/768 ,  H01L21/78 ,  H01L23/36 ,  H01L23/48 ,  H01L23/50 ,  H01L23/552 ,  H05K1/02 ,  H05K1/11 ,  H05K3/02 ,  H05K3/40 ,  A61B5/145 ,  G01N27/327 ,  H05K1/14

CPC classification number: H05K1/112 ,  A61B5/6802 ,  H01L21/768 ,  H01L23/481 ,  H05K1/0262 ,  H05K3/403 ,  A61B5/14532 ,  A61B5/14546 ,  A61B5/1468 ,  A61B5/6848 ,  G01N27/327 ,  H05K1/0219 ,  H05K1/141 ,  H05K2201/0394 ,  H05K2201/049 ,  H05K2201/0792 ,  H05K2201/09063 ,  H05K2201/09181 ,  H05K2201/10151 ,  H05K2201/10378

Abstract: An example sensor interposer employing castellated through-vias formed in a PCB includes a planar substrate defining a plurality of castellated through-vias; a first electrical contact formed on the planar substrate and electrically coupled to a first castellated through-via; a second electrical contact formed on the planar substrate and electrically coupled to a second castellated through-via, the second castellated through-via electrically isolated from the first castellated through-via; and a guard trace formed on the planar substrate, the guard trace having a first portion formed on a first surface of the planar substrate and electrically coupling a third castellated through-via to a fourth castellated through-via, the guard trace having a second portion formed on a second surface of the planar substrate and electrically coupling the third castellated through-via to the fourth castellated through-via, the guard trace formed between the first and second electrical contacts to provide electrical isolation between the first and second electrical contacts.

公开(公告)号：US09911591B2

公开(公告)日：2018-03-06

申请号：US15142497

申请日：2016-04-29

Applicant: Applied Materials, Inc.

Inventor： David Thompson ,  Mark Saly ,  Bhaskar Jyoti Bhuyan

IPC: H01L21/336 ,  H01L21/02 ,  C23C16/455 ,  C23C16/04 ,  C23C16/50 ,  H01L21/311 ,  H01L21/67 ,  C07F7/00 ,  H01L21/3105 ,  H01L21/32

CPC classification number: H05K1/0296 ,  C07F7/00 ,  C23C16/04 ,  C23C16/455 ,  C23C16/45525 ,  C23C16/50 ,  G03G15/50 ,  G03G15/80 ,  G03G21/1652 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/0228 ,  H01L21/02307 ,  H01L21/3105 ,  H01L21/31133 ,  H01L21/32 ,  H01L21/67207 ,  H05K1/0269 ,  H05K1/117 ,  H05K3/4015 ,  H05K3/403 ,  H05K2201/0394 ,  H05K2201/09063 ,  H05K2201/09181 ,  H05K2201/10287 ,  H05K2201/10363

Abstract: Methods of depositing a film selectively onto a first substrate surface relative to a second substrate surface. Methods include soaking a substrate surface comprising hydroxyl-terminations with a silylamine to form silyl ether-terminations and depositing a film onto a surface other than the silyl ether-terminated surface.

公开(公告)号：US20180049317A1

公开(公告)日：2018-02-15

申请号：US15792355

申请日：2017-10-24

Applicant: CANON KABUSHIKI KAISHA

Inventor： Shinsuke Serizawa

IPC: H05K1/02 ,  H05K1/11 ,  G03G21/16 ,  H05K3/40 ,  G03G15/00

CPC classification number: H05K1/0296 ,  G03G15/50 ,  G03G15/80 ,  G03G21/1652 ,  H05K1/0269 ,  H05K1/117 ,  H05K3/4015 ,  H05K3/403 ,  H05K2201/0394 ,  H05K2201/09063 ,  H05K2201/09181 ,  H05K2201/10287 ,  H05K2201/10363

Abstract: The printed board includes a slit portion and a first conductive member that is provided straddling the slit portion. In a state in which the printed board is attached to an apparatus to which one end of a second conductive member having an elastic force is connected, another end of the second conductive member contacts the first conductive member, and the another end of the second conductive member passes through the slit portion.

公开(公告)号：US09874335B2

公开(公告)日：2018-01-23

申请号：US14091755

申请日：2013-11-27

Applicant: LG INNOTEK CO., LTD.

Inventor： Seung Kwon Hong ,  Hyun Gyu Park ,  In Hee Cho ,  Hyuk Soo Lee

IPC: F21V19/00 ,  H05K1/02 ,  H05K3/00 ,  G02F1/1335

CPC classification number: F21V19/003 ,  G02F2001/133612 ,  H05K1/0278 ,  H05K1/028 ,  H05K3/0061 ,  H05K2201/0394 ,  H05K2201/09063 ,  H05K2201/10106 ,  H05K2203/302

Abstract: Provided is a printed circuit board including: a support substrate including a first area in which a light emitting device is mounted, and a second area extending from the first area; a bending part which is configured such that a part between the first area and the second area is bent; a through hole passing through the bending part; a connection wiring connected to the light emitting device and disposed on the bending part; and a wiring connected to the connection wiring.

公开(公告)号：US20160381786A1

公开(公告)日：2016-12-29

申请号：US14858652

申请日：2015-09-18

Applicant: FUKUI PRECISION COMPONENT (SHENZHEN) CO., LTD. ,  HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd. ,  ZHEN DING TECHNOLOGY CO., LTD.

Inventor： XIAN-QIN HU ,  FU-YUN SHEN ,  MING-JAAN HO ,  YI-QIANG ZHUANG

IPC: H05K1/02 ,  H05K3/06 ,  H05K1/09

CPC classification number: H05K1/0216 ,  H05K1/0219 ,  H05K1/0237 ,  H05K1/024 ,  H05K1/09 ,  H05K3/06 ,  H05K3/4697 ,  H05K2201/0154 ,  H05K2201/0394 ,  H05K2201/09618 ,  H05K2203/063

Abstract: A flexible circuit board includes two copper clad laminates, a circuit pattern and two bonding layers. Each copper clad laminate includes an insulating base and an outer circuit layer. The circuit pattern is located between the two copper clad laminates. The circuit pattern includes a linear signal line, two grounding lines located at two opposite sides of the linear signal line, and two hollow areas located between the linear signal line and the grounding lines. Each bonding layers is located between the circuit pattern and a corresponding copper clad laminate. Each boding layer defines a slot without adhesive therein. The bonding layers are spaced from the linear signal line by the slots. The slots and the hollow areas cooperatively define an air medium layer enclosing the linear signal line. A method for manufacturing the flexible circuit board is also provided.

Abstract translation: 柔性电路板包括两个覆铜层压板，电路图案和两个接合层。 每个覆铜层压板包括绝缘基底和外部电路层。 电路图案位于两个覆铜层压板之间。 电路图案包括线性信号线，位于线性信号线的两个相对侧的两个接地线以及位于线性信号线和接地线之间的两个中空区域。 每个结合层位于电路图案和相应的覆铜层压板之间。 每个编码层限定了一个没有粘合剂的槽。 接合层通过槽与线性信号线隔开。 狭槽和中空区域协同地限定了包围线性信号线的空气介质层。 还提供了一种用于制造柔性电路板的方法。

公开(公告)号：US09506637B2

公开(公告)日：2016-11-29

申请号：US14472075

申请日：2014-08-28

Applicant: LG INNOTEK CO., LTD.

Inventor： Hyun Gyu Park ,  Min Jae Kim ,  Se Woong Na ,  In Hee Cho ,  Man Hue Choi ,  Seung Kwon Hong

IPC: F21V7/04 ,  F21V21/14 ,  F21V8/00 ,  H05K1/02 ,  H05K3/00 ,  H05K1/05 ,  G02F1/1335

CPC classification number: F21V21/14 ,  G02B6/0068 ,  G02B6/0091 ,  G02F1/133615 ,  H05K1/0278 ,  H05K1/028 ,  H05K1/056 ,  H05K3/0061 ,  H05K2201/0394 ,  H05K2201/09054 ,  H05K2201/09063 ,  H05K2201/10106 ,  H05K2203/0195 ,  H05K2203/302

Abstract: Provided is a circuit board including: a support substrate including a first region and a second region extending to be bent from the first region; light emitting devices mounted to the first region of the support substrate; and a bending portion bent between the first region and the second region, wherein the bending portion comprises: an interconnection line arrangement portion that crosses an interconnection line; and an interconnection line protection portion disposed on the periphery of the interconnection line, wherein the interconnection line protection portion protrudes more than the interconnection line arrangement portion.

Abstract translation: 提供一种电路板，包括：支撑基板，包括第一区域和从第一区域延伸成弯曲的第二区域; 安装到支撑基板的第一区域的发光器件; 以及在所述第一区域和所述第二区域之间弯曲的弯曲部分，其中所述弯曲部分包括：穿过互连线的互连线布置部分; 以及布置在所述互连线的周边上的互连线路保护部分，其中所述互连线路保护部分比所述互连线路布置部分突出。

公开(公告)号：US09157610B2

公开(公告)日：2015-10-13

申请号：US13579110

申请日：2010-08-25

Applicant: Binhai Yu ,  Bairong Sun ,  Weiping Li ,  Xunli Xia ,  Cheng Li ,  Menghua Long ,  Lifang Liang

Inventor： Binhai Yu ,  Bairong Sun ,  Weiping Li ,  Xunli Xia ,  Cheng Li ,  Menghua Long ,  Lifang Liang

IPC: F21V19/00 ,  F21V21/00 ,  H01L33/48 ,  B23P11/00 ,  H05K1/18 ,  H01L33/62

CPC classification number: F21V21/00 ,  B23P11/00 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/48247 ,  H01L2933/0033 ,  H01L2933/0066 ,  H05K1/183 ,  H05K2201/0394 ,  H05K2201/10106 ,  Y10T29/49996 ,  H01L2224/48091 ,  H01L2924/00014

Abstract: A manufacture method for a surface mounted power LED support comprises providing a wiring board having both sided metal layers. In addition, the method comprises forming a hole. Further, the method comprises setting a metal layer in the surface of the hole. Still further, the method comprises thickening the metal layer of the wiring board. The method also comprises etching the metal layer of the wiring board. Moreover, the method comprises cutting the wiring board to form single support unit. A surface mounted power LED support comprises a both sided wiring board, a hole formed in the wiring board and wiring layers set on the surface of the wiring board.

Abstract translation: 一种用于表面贴装电源LED支架的制造方法，包括提供具有双面金属层的布线板。 另外，该方法包括形成孔。 此外，该方法包括在孔的表面设置金属层。 此外，该方法包括使布线板的金属层变厚。 该方法还包括蚀刻布线板的金属层。 此外，该方法包括切割布线板以形成单个支撑单元。 表面安装的功率LED支撑件包括双面布线板，形成在布线板中的孔和设置在布线板表面上的布线层。

公开(公告)号：US09079382B2

公开(公告)日：2015-07-14

申请号：US12922253

申请日：2009-03-25

Applicant: Tom Marttila

Inventor： Tom Marttila

IPC: H05K3/02 ,  B32B38/10 ,  G08B13/24 ,  H05K3/04 ,  B32B37/12 ,  H05K1/03 ,  H05K3/38 ,  H05K3/40

CPC classification number: H05K1/115 ,  B32B37/1292 ,  B32B38/10 ,  B32B2310/0843 ,  B32B2457/08 ,  G08B13/244 ,  H05K1/0366 ,  H05K1/0386 ,  H05K3/027 ,  H05K3/046 ,  H05K3/386 ,  H05K3/4046 ,  H05K3/4084 ,  H05K2201/0284 ,  H05K2201/0355 ,  H05K2201/0382 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2203/0522 ,  H05K2203/1388 ,  H05K2203/1394 ,  H05K2203/1545 ,  Y10T29/49156

Abstract: A method for manufacturing a circuit board featuring conductive patterns, said method comprising the following steps of: i) affixing a conductive layer, such as a metal foil (3), to a substrate material (1) selectively, such that a part of the conductive layer, such as the metal foil (3), comprising desired areas (3a) for the final product and narrow areas (3c) between the final product's conducting areas, is affixed to the substrate material (1) by means of a bond (2), and removal-intended more extensive areas (3b) of the conductive layer, for example the metal foil (3), are left substantially unattached to the substrate material in such a way that the removable area (3b) is in attachment with the substrate material (1) by not more than its edge portion to be patterned in a subsequent step ii) and possibly by sites which preclude a release of the removable areas prior to a step iii); ii) patterning, by a removal of material, the conductive layer, such as the metal foil (3), from narrow gaps between the desired conducting areas (3a), and from an outer periphery of the area (3b) removable in a solid state, for establishing conductor patterns; iii) removing the removable areas (3b), not affixed to the substrate material (1), from the conductive layer, such as the metal foil (3), in a solid state after the conductive layer's edge area, which was removed from the removable area's outer periphery during the course of step ii), no longer holds the removable areas (3b) attached by their edges to the substrate material.

Abstract translation: 一种制造具有导电图案的电路板的方法，所述方法包括以下步骤：i）选择性地将诸如金属箔（3）的导电层固定到基底材料（1）上，使得部分 导电层，例如金属箔（3），其包含用于最终产品的所需区域（3a）和最终产品的导电区域之间的狭窄区域（3c），通过粘合剂（1）固定到基底材料（1） 导电层，例如金属箔（3）的移除目的更广泛的区域（3b）基本上不附着于基底材料，使得可移除区域（3b）与 基底材料（1）不超过其后续步骤ii）中待图案化的边缘部分，并且可能通过在步骤iii）之前排除可释放区域的释放的部位; ii）通过从所需导电区域（3a）之间的狭窄间隙和从固体可移除的区域（3b）的外周边去除导电层（例如金属箔（3））的图案， 状态，用于建立导体图案; iii）在导电层的边缘区域从固体状态除去导电层的边缘区域之后，从导电层（例如金属箔（3））上去除不附着于基底材料（1）的可移除区域（3b） 在步骤ii）的过程中，可移除区域的外围不再将其边缘附着的可移除区域（3b）保持在衬底材料上。

公开(公告)号：US09035189B2

公开(公告)日：2015-05-19

申请号：US12997867

申请日：2009-06-08

Applicant: Wolfgang Pahl ,  Hans Krueger ,  Peter Demmer

Inventor： Wolfgang Pahl ,  Hans Krueger ,  Peter Demmer

IPC: H05K1/00 ,  H05K1/18 ,  H05K3/46

CPC classification number: H05K1/189 ,  H01L2224/16225 ,  H05K3/4691 ,  H05K2201/0394 ,  H05K2201/09081 ,  H05K2201/09109 ,  H05K2203/308 ,  Y10T29/49124 ,  Y10T428/24322

Abstract: A circuit board comprising a circuit carrier, a cover layer composed of a nonconductive material, comprising an organic substance, arranged on the circuit carrier, a first metallization layer at least partly arranged on the cover layer, wherein the first metallization layer has a flexible region.

Abstract translation: 一种电路板，包括电路载体，由非导电材料构成的覆盖层，包括布置在电路载体上的有机物质，至少部分地布置在覆盖层上的第一金属化层，其中第一金属化层具有柔性区域 。

公开(公告)号：US09003648B2

公开(公告)日：2015-04-14

申请号：US12521558

申请日：2007-12-28

Applicant: Ken Holcomb

Inventor： Ken Holcomb

IPC: H05K3/36 ,  H05K3/46 ,  H05K3/38 ,  H05K3/40

CPC classification number: H05K3/4614 ,  H05K3/386 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/462 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/0394 ,  H05K2201/10378 ,  H05K2203/061 ,  Y10T29/49002 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T156/1056

Abstract: The invention provides methods to mass laminate and interconnect high density interconnect circuit layers fabricated through parallel processing. Invention methods employ an inside-out interconnection strategy that eliminates plating of vias and provides defect-free outer circuit layers. Conductive paste and via layers are also key features of the invention.

Abstract translation: 本发明提供了通过并行处理制造的质量叠层和互连高密度互连电路层的方法。 本发明的方法采用内向外互连策略，其消除通孔的电镀并提供无缺陷的外部电路层。 导电浆料和通孔层也是本发明的关键特征。