摘要:
Aspects of the invention may comprise an integrated circuit comprising a memory, a temperature sensor, a crystal, and a communication module. Data stored in the memory may indicate a frequency of the crystal as a function of temperature and/or time. The memory may be writable via the communication module. Data stored in the memory of the integrated circuit may be updated based on an age and/or time of use of the integrated circuit. The time of use may be one or both of: how long the crystal has been oscillating since its most-recent start up, and how long the crystal has been in use over its lifetime. An electronic device may calculate a frequency of an oscillating signal output by the crystal based on a temperature indication from the temperature sensor and data read from the memory of the integrated circuit.
摘要:
Aspects of a method and system for signal generation via a temperature sensing crystal integrated circuit are provided. In this regard, a temperature sensing crystal integrated circuit (TSCIC) comprising a memory and a crystal or crystal oscillator may generate a signal indicative of a measured temperature. The generated signal and data stored in the memory may be utilized to configure one or more circuits communicatively coupled to the TSCIC. The data stored in the memory may characterize behavior of the TSCIC as a function of temperature and/or time. The data characterizing the behavior of the TSCIC may indicate variations in frequency of the crystal or crystal oscillator as a function of temperature and/or time. The data characterizing the behavior of the TSCIC may comprise one or both of a frequency value and a frequency correction value.
摘要:
Aspects of the invention may comprise an integrated circuit comprising a memory, a temperature sensor, a crystal, and a communication module. Data stored in the memory may indicate a frequency of the crystal as a function of temperature and/or time. The memory may be writable via the communication module. Data stored in the memory of the integrated circuit may be updated based on an age and/or time of use of the integrated circuit. The time of use may be one or both of: how long the crystal has been oscillating since its most-recent start up, and how long the crystal has been in use over its lifetime. An electronic device may calculate a frequency of an oscillating signal output by the crystal based on a temperature indication from the temperature sensor and data read from the memory of the integrated circuit.
摘要:
Aspects of a method and system for a temperature sensing crystal Integrated circuit with digital temperature output are provided. In this regard, an indication of temperature may be generated in an integrated circuit (IC) comprising a memory, a crystal or crystal oscillator, and at least a portion of an analog-to-digital converter. The temperature indication may be digitized via the analog-to-digital converter. Operation of one or more circuits may be controlled based on the digital temperature indication. The digital temperature indication may be communicated over a communication bus. An analog portion of the analog-to-digital converter may be integrated in the IC and may comprise, for example, a delta-sigma modulator. A digital portion of the analog-to-digital converter may be external to the IC and may comprise, for example, a digital filter.
摘要:
A direct-sequence spread spectrum (DSSS) receiver may be operable to process signal samples in frequency domain utilizing a prime factor fast Fourier transform (FFT) circuit and a pseudorandom noise (PRN) code. The DSSS receiver may be operable to transform the signal samples into FFT signal samples using the prime factor FFT circuit, transform the PRN code into a FFT PRN code using the prime factor FFT circuit and multiply the FFT signal samples with the FFT PRN code using the prime factor FFT circuit. The DSSS receiver may be operable to inversely transform the multiplied FFT signal samples into correlated signal samples using a prime factor inverse FFT (IFFT) implemented by the prime factor FFT circuit. The prime factor FFT circuit may comprise a prime length FFT core, a FFT memory, a register bank, a switch, a multiplier and a FFT controller.
摘要:
Aspects of a method and system for using a frequency locked loop LOGEN in oscillator systems may include generating an oscillating signal via one or more circuits comprising a feedback loop. The generation may be controlled by enabling or disabling the feedback loop, based on the generated oscillating signal. The one or more circuits may comprise a frequency-locked loop (FLL) that may enable the generation of the oscillating signal. The frequency-locked loop may comprise a voltage-controlled oscillator. The feedback loop may be disabled when an estimated frequency difference between a reference signal and a feedback signal may be less than or equal to a specified threshold. The feedback loop may be enabled when an estimated frequency difference between a reference signal and a feedback signal may be greater than a particular threshold.
摘要:
A global navigation satellite system (GNSS) enabled mobile device may be operable to assert one of autoblank signals when RF interference is detected in received GNSS signals for one of consecutive first time windows. The asserted autoblank signals are monitored by the GNSS enabled mobile device over time intervals corresponding to consecutive second time windows and a rate at which the autoblank signals are asserted for each of the consecutive second time windows is determined by the GNSS enabled mobile device based on the monitoring. The GNSS enabled mobile device may be operable to determine whether to blank processing of the received GNSS signals based on the determined rate. The autoblank signals may be asserted by the GNSS enabled mobile device based on a number of the received GNSS signals whose absolute signal levels exceed a signal level threshold for the first time window.
摘要:
A global navigation satellite system (GNSS) enabled mobile device may be operable to assert one of autoblank signals when RF interference is detected in received GNSS signals for one of consecutive first time windows. The asserted autoblank signals are monitored by the GNSS enabled mobile device over time intervals corresponding to consecutive second time windows and a rate at which the autoblank signals are asserted for each of the consecutive second time windows is determined by the GNSS enabled mobile device based on the monitoring. The GNSS enabled mobile device may be operable to determine whether to blank processing of the received GNSS signals based on the determined rate. The autoblank signals may be asserted by the GNSS enabled mobile device based on a number of the received GNSS signals whose absolute signal levels exceed a signal level threshold for the first time window.
摘要:
A global navigation satellite system (GNSS) enabled mobile device may be operable to monitor and determine counts at which autoblank signals are asserted over time intervals corresponding to consecutive time windows during the RF interference mitigation process using autoblanking. The GNSS enabled mobile device may be operable to disable the generation of a blank signal when the count may be greater than a particular count threshold at the end of the time window. The GNSS enabled mobile device may be operable to enable the generation of a blank signal when the count may be less than or equal to a particular count threshold at the end of the time window. The blank signals may be used to blank the processing of the received GNSS signals.
摘要:
A direct-sequence spread spectrum (DSSS) receiver may be operable to process signal samples in frequency domain utilizing a prime factor fast Fourier transform (FFT) circuit and a pseudorandom noise (PRN) code. The DSSS receiver may be operable to transform the signal samples into FFT signal samples using the prime factor FFT circuit, transform the PRN code into a FFT PRN code using the prime factor FFT circuit and multiply the FFT signal samples with the FFT PRN code using the prime factor FFT circuit. The DSSS receiver may be operable to inversely transform the multiplied FFT signal samples into correlated signal samples using a prime factor inverse FFT (IFFT) implemented by the prime factor FFT circuit. The prime factor FFT circuit may comprise a prime length FFT core, a FFT memory, a register bank, a switch, a multiplier and a FFT controller.