Noise predictive maximum likelihood (NPML) detection methods and
apparatus based thereon
    2.
    发明授权
    Noise predictive maximum likelihood (NPML) detection methods and apparatus based thereon 失效
    基于此的噪声预测最大似然(NPML)检测方法和装置

    公开(公告)号:US06104766A

    公开(公告)日:2000-08-15

    申请号:US715174

    申请日:1996-09-17

    摘要: The invention is family of noise predictive maximum liklihood (NPML) symbol detectors that are particularly useful in direct access storage devices. Various embodiments representative of the family of detectors are described. In general, the NPML detectors include a sequence detector with imbedded feedback which may be preceded by a filter, e.g., a prediction error filter. The sequence of detectors, which may be Viterbi detectors, have an imbedded filter whose coefficients are determined by the convolution of the partial response (PR) or generalized PR function with the predictor coefficients and do not require multiplications and, thus, allows a simple RAM look-up for intersymbol-interference ISI cancelation. In one class of embodiments, the NPML detector comprises a prediction error filter of length N, cascaded with a sequence detector having 2.sup.K states, and a feedback filter imbedded in the sequence detector, having a length N+P-K, where P is length of the generalized PR shaping polynomial (P=2 yields PR4), and 0.ltoreq.K.ltoreq.N+P.

    摘要翻译: 本发明是在直接存取存储设备中特别有用的噪声预测最大似然(NPML)符号检测器系列。 描述了代表检测器系列的各种实施例。 通常,NPML检测器包括具有嵌入反馈的序列检测器,其可以在滤波器之前,例如预测误差滤波器。 可以是维特比检测器的检测器序列具有嵌入式滤波器,其系数由部分响应(PR)或广义PR函数与预测器系数的卷积确定,并且不需要乘法,并且因此允许简单的RAM 查询符号间干扰ISI取消。 在一类实施例中,NPML检测器包括长度为N的预测误差滤波器,与具有2K状态的序列检测器级联,以及嵌入在序列检测器中的反馈滤波器,其长度为N + PK,其中P为 广义PR整形多项式(P = 2产生PR4),0

    Early detection of degradation in NAND flash memory
    3.
    发明授权
    Early detection of degradation in NAND flash memory 失效
    早期检测NAND闪存中的劣化

    公开(公告)号:US08422296B2

    公开(公告)日:2013-04-16

    申请号:US12930016

    申请日:2010-12-22

    IPC分类号: G11C11/34

    CPC分类号: G11C16/3495

    摘要: Techniques for early detection of degradation in NAND Flash memories by measuring the dispersion of the threshold voltages (VT's), of a set (e.g. page) of NAND Flash memory cells during read operations are described. In an embodiment of the invention the time-to-completion (TTC) values for the read operation for the memory cells are used as a proxy for dispersion of the threshold voltages (VT's). A Dispersion Analyzer determines the dispersion of the set of TTC values. In one embodiment the delta between the maximum and minimum TTC values is used as the dispersion measurement. If the measured TTC dispersion differs by more than a selected amount from a reference dispersion value, a warning signal is provided to indicate that the page of memory has degraded. The warning signal can be used to take appropriate action such as moving the data to a new page.

    摘要翻译: 描述了在读取操作期间通过测量NAND闪存单元组(例如页面)的阈值电压(VT)的偏差来早期检测NAND闪存中的劣化的技术。 在本发明的一个实施例中,用于存储器单元的读取操作的完成时间(TTC)值用作阈值电压(VT)的色散的代理。 色散分析仪确定一组TTC值的色散。 在一个实施例中,使用最大和最小TTC值之间的差值作为色散测量。 如果测量的TTC色散比参考色散值差多于选定量,则提供警告信号以指示存储器页面已经劣化。 警告信号可用于采取适当措施,例如将数据移动到新页面。

    Systems Using Low Density Parity Check Codes For Correcting Errors
    6.
    发明申请
    Systems Using Low Density Parity Check Codes For Correcting Errors 有权
    使用低密度奇偶校验码纠正错误的系统

    公开(公告)号:US20090235142A1

    公开(公告)日:2009-09-17

    申请号:US12046108

    申请日:2008-03-11

    IPC分类号: H03M13/11 G06F11/10

    CPC分类号: H03M13/1111 G11B20/18

    摘要: A system corrects errors in a bit stream. The system includes an encoder and a decoder. The encoder encodes the bit stream using a low density parity check code by inserting parity check bits into the bit stream to generate codewords. The decoder decodes the codewords using parity check equations that are based on the low density parity check code. The parity check bits may comprise no more than four percent of the bits in the codewords of the low density parity check code. The low density parity check code can have a minimum separation of at least 7 between any two ones in each row of a parity-check matrix that is based on the low density parity check code. The encoder and the decoder can be defined in hardware using logic circuits that are interconnected to implement a trellis based on the low density parity check code.

    摘要翻译: 系统校正位流中的错误。 该系统包括编码器和解码器。 编码器使用低密度奇偶校验码将奇偶校验位插入比特流来编码比特流以产生码字。 解码器使用基于低密度奇偶校验码的奇偶校验等式来解码码字。 奇偶校验位可以包括不超过低密度奇偶校验码的码字中的比特的百分之四。 低密度奇偶校验码可以在基于低密度奇偶校验码的奇偶校验矩阵的每行中的任何两个之间具有至少7的最小间隔。 编码器和解码器可以使用互连的逻辑电路在硬件中定义,以实现基于低密度奇偶校验码的网格。

    Intelligent envelope detector and method for gain control for PRML data
and servo channels including polarity detection
    10.
    发明授权
    Intelligent envelope detector and method for gain control for PRML data and servo channels including polarity detection 失效
    智能包络检测器和PRML数据和伺服通道增益控制方法,包括极性检测

    公开(公告)号:US5708537A

    公开(公告)日:1998-01-13

    申请号:US555781

    申请日:1995-11-09

    IPC分类号: G11B5/09 G11B20/10

    摘要: A method and apparatus are provided for gain adjustment of a signal. A plurality of comparators compare the signal with a plurality of threshold values. An envelope detector coupled to the comparator includes a peak capture function for detecting the amplitude of the signal and a polarity memory for detecting polarity of the signal. A gain control function for setting a gain correction value is responsive to the peak capture function and the polarity memory. Features of the signal gain adjustment method and apparatus of the invention include an intelligent hold of the gain control over both thermal asperities and null gaps in the signal.

    摘要翻译: 提供了一种用于信号增益调整的方法和装置。 多个比较器将信号与多个阈值进行比较。 耦合到比较器的包络检测器包括用于检测信号幅度的峰值捕获功能和用于检测信号的极性的极性存储器。 用于设置增益校正值的增益控制功能响应于峰值捕获功能和极性存储器。 本发明的信号增益调整方法和装置的特征包括对信号中的热粗糙度和空隙的增益控制的智能保持。