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    Dual-edge tracking synchronous rectifier control techniques for a resonant converter
    1.
    发明授权
    Dual-edge tracking synchronous rectifier control techniques for a resonant converter 有权
    用于谐振转换器的双边跟踪同步整流控制技术

    公开(公告)号：US09584035B2

    公开(公告)日：2017-02-28

    申请号：US14524423

    申请日：2014-10-27

    申请人： Fairchild Semiconductor Corporation

    发明人： Hangseok Choi

    IPC分类号： H02M3/335 ,  H02M1/00 ,  H02M5/42 ,  H02M7/04 ,  H02M7/68 ,  H02M3/24 ,  H02M7/44

    CPC分类号： H02M3/33592 ,  H02M3/3353 ,  H02M2001/0058 ,  Y02B70/1433 ,  Y02B70/1475 ,  Y02B70/1491 ,  Y02P80/112

    摘要： This disclosure provides control techniques for a resonant converter. In one control technique, for switching speeds that are below the resonant frequency of the primary stage of the converter, the switches of the synchronous rectifier (SR) portion (SR switches) of the resonant converter are controlled based on a rising edge of the corresponding primary side switch and the turn off time of a corresponding SR switch. In general, for below resonance operation, each corresponding SR switch will be turned off prior to the falling edge of each corresponding primary side switch, while each corresponding SR switch will be turned on at the rising edge of the each corresponding primary side switch. The conduction time of respective SR switches is generally constant for below resonance operation. In another control technique, for switching speeds that are above the resonant frequency of the primary stage of the converter, the SR switches are controlled based on the falling and rising edges of the voltage across the each corresponding SR switch. In general, for above resonance operation, each corresponding SR switch will be turned off after the falling edge of each corresponding primary side switch, while each corresponding SR switch will be turned on after the rising edge of the each corresponding primary side switch.

    摘要翻译： 本公开提供了一种用于谐振转换器的控制技术。 在一种控制技术中，对于低于转换器的初级级谐振频率的开关速度，谐振转换器的同步整流器（SR）部分（SR）开关的开关基于相应的上升沿来控制 初级侧开关和相应的SR开关的关闭时间。 一般来说，对于低于共振操作，每个对应的初级侧开关的下降沿之前，每个对应的SR开关将被关闭，而每个相应的初级侧开关的上升沿将会打开每个对应的SR开关。 对于低于谐振操作，各个SR开关的导通时间通常是恒定的。 在另一种控制技术中，对于高于转换器初级级谐振频率的开关速度，SR开关基于每个对应的SR开关上的电压的下降沿和上升沿来控制。 一般来说，对于上述共振操作，每个相应的初级侧开关的下降沿之后，每个对应的SR开关将被关闭，而每个相应的初级侧开关的上升沿之后，每个对应的SR开关将被接通。

    Control of a startup circuit using a feedback pin of a PWM controller integrated circuit chip
    4.
    发明授权
    Control of a startup circuit using a feedback pin of a PWM controller integrated circuit chip 有权

    公开(公告)号：US09812976B2

    公开(公告)日：2017-11-07

    申请号：US15144316

    申请日：2016-05-02

    申请人： FAIRCHILD SEMICONDUCTOR CORPORATION

    发明人： Hangseok Choi

    IPC分类号： H02M1/36 ,  H02M3/335 ,  H02M1/00

    CPC分类号： H02M3/33553 ,  H02M1/36 ,  H02M2001/0006 ,  H02M2001/0009

    摘要： A power supply includes a control transistor that controls a primary winding of a transformer to induce current on a secondary winding of the transformer to generate an output voltage. A pulse width modulation (PWM) controller integrated circuit (IC) chip drives the control transistor through a gate pin. The PWM controller IC chip has a feedback pin that receives a feedback signal indicative of the output voltage. A high voltage (HV) startup transistor is controlled through the feedback pin. The HV startup transistor turns ON during startup to generate a supply voltage from current received from the input voltage of the power supply. The HV startup transistor turns OFF when the supply voltage reaches a startup voltage level that is sufficient to start the switching operation of the control transistor and thereby receive operating current from an auxiliary winding of the transformer.

    Power factor correction circuit and method
    8.
    发明授权
    Power factor correction circuit and method 有权

    公开(公告)号：US10090757B2

    公开(公告)日：2018-10-02

    申请号：US15673011

    申请日：2017-08-09

    申请人： FAIRCHILD SEMICONDUCTOR CORPORATION

    发明人： Jintae Kim ,  Sangcheol Moon ,  Hangseok Choi

    IPC分类号： H02M1/42 ,  H02M1/08 ,  H02M7/06 ,  H02M1/00

    摘要： A Power Factor Correction (PFC) circuit includes an oscillator circuit. The oscillator circuit receives a valley detect signal indicating a zero current condition, determines a blanking time according to an operational cycle of the PFC circuit, and determines to initiate the operational cycle according to the valley detect signal and the blanking time. Determining the blanking time includes selecting one of a plurality of predetermined blanking times according to a count of operational cycles of the PFC circuit. The PFC circuit may operate in a Boundary Conduction Mode or a Discontinuous Conduction Mode depending on whether a charge-discharge period is greater than the blanking time. The PFC circuit may determine, according to its output voltage, a first duration of a charging period, determine a delay time according to zero current times of previous operational cycles, and extend the first duration of the charging period by the delay time.