On-chip apparatus and method for jitter measurement

    公开(公告)号:US10009017B2

    公开(公告)日:2018-06-26

    申请号:US14949888

    申请日:2015-11-24

    CPC classification number: H03K5/14 G01R31/31709 H03K2005/00019

    Abstract: An apparatus for jitter measurement includes a first delay circuit, a second delay circuit, and a control circuit. The first delay circuit imposes a preliminary phase delay on an input signal to generate a delayed input signal. The second delay circuit operates with the first delay circuit to impose a fine phase delay on the delayed input signal. The control circuit controls amounts of delays imposed by the first and second delay circuits, and fine tunes the phase delay of the delayed input signal according to the amounts of delays respectively imposed by delay elements of the first and second delay circuits, and estimates or calculates a jitter window for the input signal according to adjustment results of the first and second delay circuits.

    ON-CHIP APPARATUS AND METHOD FOR JITTER MEASUREMENT
    2.
    发明申请
    ON-CHIP APPARATUS AND METHOD FOR JITTER MEASUREMENT 有权
    芯片测量装置及其测量方法

    公开(公告)号:US20160363619A1

    公开(公告)日:2016-12-15

    申请号:US14949888

    申请日:2015-11-24

    CPC classification number: H03K5/14 G01R31/31709 G01R31/31937 H03K2005/00019

    Abstract: An apparatus for jitter measurement includes a first delay circuit, a second delay circuit, and a control circuit. The first delay circuit imposes a preliminary phase delay on an input signal to generate a delayed input signal. The second delay circuit operates with the first delay circuit to impose a fine phase delay on the delayed input signal. The control circuit controls amounts of delays imposed by the first and second delay circuits, and fine tunes the phase delay of the delayed input signal according to the amounts of delays respectively imposed by delay elements of the first and second delay circuits, and estimates or calculates a jitter window for the input signal according to adjustment results of the first and second delay circuits.

    Abstract translation: 用于抖动测量的装置包括第一延迟电路,第二延迟电路和控制电路。 第一延迟电路对输入信号施加初步相位延迟以产生延迟的输入信号。 第二延迟电路与第一延迟电路一起工作,以对延迟的输入信号施加精细相位延迟。 控制电路控制由第一和第二延迟电路施加的延迟量,并且根据由第一和第二延迟电路的延迟元件分别施加的延迟量微调延迟输入信号的相位延迟,并且估计或计算 根据第一和第二延迟电路的调整结果,输入信号的抖动窗口。

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