High-speed data connector
    1.
    发明授权

    公开(公告)号:US10101537B2

    公开(公告)日:2018-10-16

    申请号:US15383786

    申请日:2016-12-19

    Abstract: A transceiver connector may include a bottomside connector. The bottomside connector may include a first ground pin adjacent to an edge of the bottomside connector, a first high-speed differential input pin adjacent to the first ground pin, a second high-speed differential input pin adjacent to the first high-speed differential input pin, a second ground pin adjacent to the second high-speed differential input pin, a serial interface data line pin adjacent to the second ground pin, a serial interface clock pin adjacent to the serial interface data line pin, a third ground pin adjacent to the serial interface clock pin, a first high-speed differential output pin adjacent to the third ground pin, a second high-speed differential output pin adjacent to the first high-speed differential output pin, and a fourth ground pin adjacent to the second high-speed differential output pin.

    HIGH-SPEED DATA CONNECTOR
    3.
    发明申请

    公开(公告)号:US20170179627A1

    公开(公告)日:2017-06-22

    申请号:US15383786

    申请日:2016-12-19

    CPC classification number: G02B6/3807 G02B6/4246 H01R13/6471 H04B10/40

    Abstract: A transceiver connector may include a bottomside connector. The bottomside connector may include a first ground pin adjacent to an edge of the bottomside connector, a first high-speed differential input pin adjacent to the first ground pin, a second high-speed differential input pin adjacent to the first high-speed differential input pin, a second ground pin adjacent to the second high-speed differential input pin, a serial interface data line pin adjacent to the second ground pin, a serial interface clock pin adjacent to the serial interface data line pin, a third ground pin adjacent to the serial interface clock pin, a first high-speed differential output pin adjacent to the third ground pin, a second high-speed differential output pin adjacent to the first high-speed differential output pin, and a fourth ground pin adjacent to the second high-speed differential output pin.

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