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1.发明申请METHOD AND ARRANGEMENT FOR CACHE MEMORY MANAGEMENT, RELATED PROCESSOR ARCHITECTURE 有权缓存记忆管理的方法与布置，相关处理器架构公开(公告)号：US20080016317A1
公开(公告)日：2008-01-17
申请号：US11768462
申请日：2007-06-26
IPC分类号： G06F15/00
CPC分类号： G06F12/084 , G06F12/0886 , Y02D10/13
摘要： A data cache memory coupled to a processor including processor clusters are adapted to operate simultaneously on scalar and vectorial data by providing data locations in the data cache memory for storing data for processing. The data locations are accessed either in a scalar mode or in a vectorial mode. This is done by explicitly mapping the data locations that are scalar and the data locations that are vectorial.
摘要翻译： 耦合到包括处理器集群的处理器的数据高速缓冲存储器适于通过在数据高速缓冲存储器中提供用于存储用于处理的数据的数据位置同时操作标量和矢量数据。 数据位置以标量模式或矢量模式进行访问。 这通过明确地映射标量的数据位置和矢量的数据位置来完成。
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公开(公告)号：US20080016319A1
公开(公告)日：2008-01-17
申请号：US11768481
申请日：2007-06-26
IPC分类号： G06F15/00
CPC分类号： G06F9/3012 , G06F9/30014 , G06F9/30036 , G06F9/30109 , G06F9/3824 , G06F9/3828 , G06F9/3885 , G06F9/3891
摘要： A processor architecture for multimedia applications includes processor clusters providing vectorial data processing capability. Processing elements in the processor clusters process both data with a bit length N and data with bit lengths N/2, N/4, and so on according to a Single Instruction Multiple Data (SIMD) function. A load unit loads into the processor clusters data to be processed according to a same instruction. An intercluster data path exchanges data between the processor clusters. The intercluster data path is scalable to activate selected processor clusters. The processor operates simultaneously on SIMD, scalar and vectorial data.
摘要翻译： 用于多媒体应用的处理器架构包括提供矢量数据处理能力的处理器集群。 处理器集群中的处理元件根据单指令多数据（SIMD）功能处理位长度为N的数据和位长度为N / 2，N / 4等的数据。 负载单元根据相同的指令加载到要处理的处理器集群数据中。 集群间数据路径在处理器集群之间交换数据。 集群间数据路径是可扩展的，以激活所选择的处理器集群。 处理器在SIMD，标量和矢量数据上同时运行。
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3.发明授权Processor architecture with processing clusters providing vector and scalar data processing capability 有权具有处理集群的处理器架构，提供向量和标量数据处理能力公开(公告)号：US08060725B2
公开(公告)日：2011-11-15
申请号：US11768481
申请日：2007-06-26
IPC分类号： G06F15/00
CPC分类号： G06F9/3012 , G06F9/30014 , G06F9/30036 , G06F9/30109 , G06F9/3824 , G06F9/3828 , G06F9/3885 , G06F9/3891
摘要： A processor architecture for multimedia applications includes processor clusters providing vectorial data processing capability. Processing elements in the processor clusters process both data with a bit length N and data with bit lengths N/2, N/4, and so on according to a Single Instruction Multiple Data (SIMD) function. A load unit loads into the processor clusters data to be processed according to a same instruction. An intercluster data path exchanges data between the processor clusters. The intercluster data path is scalable to activate selected processor clusters. The processor operates simultaneously on SIMD, scalar and vectorial data.
摘要翻译： 用于多媒体应用的处理器架构包括提供矢量数据处理能力的处理器集群。 处理器集群中的处理元件根据单指令多数据（SIMD）功能处理位长度为N的数据和位长度为N / 2，N / 4等的数据。 负载单元根据相同的指令加载到要处理的处理器集群数据中。 集群间数据路径在处理器集群之间交换数据。 集群间数据路径是可扩展的，以激活所选择的处理器集群。 处理器在SIMD，标量和矢量数据上同时运行。
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4.发明授权Method and arrangement for cache memory management, related processor architecture 有权高速缓存存储器管理方法与布置，相关处理器架构公开(公告)号：US08078804B2
公开(公告)日：2011-12-13
申请号：US11768462
申请日：2007-06-26
CPC分类号： G06F12/084 , G06F12/0886 , Y02D10/13
摘要： A data cache memory coupled to a processor including processor clusters are adapted to operate simultaneously on scalar and vectorial data by providing data locations in the data cache memory for storing data for processing. The data locations are accessed either in a scalar mode or in a vectorial mode. This is done by explicitly mapping the data locations that are scalar and the data locations that are vectorial.
摘要翻译： 耦合到包括处理器集群的处理器的数据高速缓冲存储器适于通过在数据高速缓冲存储器中提供用于存储用于处理的数据的数据位置同时操作标量和矢量数据。 数据位置以标量模式或矢量模式进行访问。 这通过明确地映射标量的数据位置和矢量的数据位置来完成。
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公开(公告)号：US20050283587A1
公开(公告)日：2005-12-22
申请号：US11145780
申请日：2005-06-06
CPC分类号： G06F15/8023 , G06F1/3203 , G06F1/3287 , G06F9/3885 , G06F9/3887 , Y02D10/171 , Y02D50/20
摘要： A processor architecture includes a number of processing elements for treating input signals. The architecture is organized according to a matrix including rows and columns, the columns of which each include at least one microprocessor block having a computational part and a set of associated processing elements that are able to receive the same input signals. The number of associated processing elements is selectively variable in the direction of the column so as to exploit the parallelism of said signals. The architecture can be scaled in various dimensions in an optimal configuration for the algorithm to be executed.
摘要翻译： 处理器架构包括用于处理输入信号的多个处理元件。 该架构根据包括行和列的矩阵来组织，其列包括至少一个具有计算部分的微处理器块和能够接收相同输入信号的一组相关联的处理元件。 相关联的处理元件的数量在列的方向上选择性地变化，以便利用所述信号的并行性。 该架构可以在要执行的算法的最佳配置中以各种尺寸缩放。
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6.发明授权公开(公告)号：US07292664B2
公开(公告)日：2007-11-06
申请号：US10684217
申请日：2003-10-10
IPC分类号： H04L7/00
CPC分类号： H04B1/70735 , H04B1/708 , H04B1/7083 , H04B2201/70702 , H04B2201/70707
摘要： To obtain frame synchronization and identify the cell codegroup in a cellular communication system (such as a system based upon the standard 3GPP FDD), there are available the synchronization codes organized in chips or letters transmitted at the beginning of respective slots. Slot synchronization is obtained previously in a first step of the operation of cell search. During a second step, there are acquired, by means of correlation or fast Hadamard transform, the energy values corresponding to the respective individual letters with reference to the possible starting positions of the corresponding frame within the respective slot. Operating in a serial way at the end of acquisition of the aforesaid energy values of the individual letters, or else operating in parallel, the energies of the corresponding words are determined. Of these energies only the maximum word-energy value and the information for the corresponding starting position are stored in a memory structure. Said maximum value and said starting position identify, respectively, the cell codes and the frame synchronization sought. One application is in mobile communication systems based upon standards such as UMTS, CDMA2000, IS95, or WBCDMA.
摘要翻译： 为了获得帧同步并在蜂窝通信系统（例如基于标准3GPP FDD的系统）中识别小区代码组，可以使用以相应时隙开头发送的芯片或字母组织的同步码。 在小区搜索的操作的第一步骤中先前获得了时隙同步。 在第二步骤中，通过相关或快速Hadamard变换，参照各个时隙内对应的帧的可能的起始位置获取与各个字母对应的能量值。 在单个字母的上述能量值的获取结束时以串行方式操作，或者并行操作，确定相应词语的能量。 在这些能量中，只有最大字能量值和对应起始位置的信息被存储在存储器结构中。 所述最大值和所述起始位置分别识别所述小区代码和所述帧同步。 一种应用是基于UMTS，CDMA2000，IS95或WBCDMA等标准的移动通信系统。
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7.发明授权公开(公告)号：US07733396B2
公开(公告)日：2010-06-08
申请号：US10696396
申请日：2003-10-29
申请人： Francesco Pappalardo , Alessandro Capra , Massimo Mancuso , Hervé Broquin , Paolo Antonino Fodera , Elena Salurso
发明人： Francesco Pappalardo , Alessandro Capra , Massimo Mancuso , Hervé Broquin , Paolo Antonino Fodera , Elena Salurso
CPC分类号： H04N1/648
摘要： Digital video signals, such as the signals generated by an image sensor in a Bayer format, are converted into an encoded format. In the Bayer format, the pixels of each line are alternately coded with two colors, and then converted into the encoded format. In the encoded format, the pixels of the digital video signals are reordered into sets of adjacent pixels, such that the sets group pixels coded with the same color. The encoded signal data results in a reduced switching activity when transmitted over a bus.
摘要翻译： 诸如由拜耳格式的图像传感器产生的信号的数字视频信号被转换成编码格式。 在拜耳格式中，每行的像素被交替地用两种颜色编码，然后被转换为编码格式。 在编码格式中，将数字视频信号的像素重新排列成相邻像素的集合，使得组合像素以相同颜色编码。 编码的信号数据在总线上传输时导致切换活动降低。
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8.发明申请Method for automatic gain control, for instance in a telecommunication system, device and computer program product therefor 有权用于自动增益控制的方法，例如在电信系统，设备和计算机程序产品中公开(公告)号：US20050031057A1
公开(公告)日：2005-02-10
申请号：US10888088
申请日：2004-07-09
申请人： Ettore Messina , Nicolo Piazzese , Giuseppe Lippolis , Elena Salurso , Alberto Serratore , Agostino Galluzzo
发明人： Ettore Messina , Nicolo Piazzese , Giuseppe Lippolis , Elena Salurso , Alberto Serratore , Agostino Galluzzo
CPC分类号： H03G3/3052 , H03G3/3036 , H03M1/185
摘要： A method for automatic gain control of an output signal generated from an input signal includes measuring power of the output signal. Measuring power of the output signal includes setting at least one power threshold, measuring a rate of crossing of the at least one power threshold by the output signal over an observation window, and deriving from the rate of crossing a measured power of the output signal. The method further includes providing a reference power, subtracting the measured power from the reference power to obtain an error signal, and mixing the input signal with the error signal. An analog-to-digital conversion is performed on a result of the mixing to obtain a gain-controlled output signal.
摘要翻译： 用于对从输入信号产生的输出信号进行自动增益控制的方法包括测量输出信号的功率。 输出信号的测量功率包括设置至少一个功率阈值，通过观测窗口测量所述至少一个功率阈值与所述输出信号的交叉速率，以及从所述输出信号的测量功率的交叉速率导出。 该方法还包括提供参考功率，从参考功率中减去测量的功率以获得误差信号，以及将输入信号与误差信号混合。 对混合的结果执行模数转换以获得增益控制的输出信号。
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9.发明授权Method for automatic gain control, for instance in a telecommunication system, device and computer program product therefor 有权用于自动增益控制的方法，例如在电信系统，设备和计算机程序产品中公开(公告)号：US07447283B2
公开(公告)日：2008-11-04
申请号：US10888088
申请日：2004-07-09
申请人： Ettore Messina , Nicolò Ivan Piazzese , Giuseppe Lippolis , Elena Salurso , Alberto Serratore , Agostino Galluzzo
发明人： Ettore Messina , Nicolò Ivan Piazzese , Giuseppe Lippolis , Elena Salurso , Alberto Serratore , Agostino Galluzzo
IPC分类号： H04L27/08
CPC分类号： H03G3/3052 , H03G3/3036 , H03M1/185
摘要： A method for automatic gain control of an output signal generated from an input signal includes measuring power of the output signal. Measuring power of the output signal includes setting at least one power threshold, measuring a rate of crossing of the at least one power threshold by the output signal over an observation window, and deriving from the rate of crossing a measured power of the output signal. The method further includes providing a reference power, subtracting the measured power from the reference power to obtain an error signal, and mixing the input signal with the error signal. An analog-to-digital conversion is performed on a result of the mixing to obtain a gain-controlled output signal.
摘要翻译： 用于对从输入信号产生的输出信号进行自动增益控制的方法包括测量输出信号的功率。 输出信号的测量功率包括设置至少一个功率阈值，通过观测窗口测量所述至少一个功率阈值与所述输出信号的交叉速率，以及从所述输出信号的测量功率的交叉速率导出。 该方法还包括提供参考功率，从参考功率中减去测量的功率以获得误差信号，以及将输入信号与误差信号混合。 对混合的结果执行模数转换以获得增益控制的输出信号。
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