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Patent Agency Ranking
公开(公告)号：US08873466B2
公开(公告)日：2014-10-28
申请号：US13650138
申请日：2012-10-12
Applicant: Freescale Semiconductor, Inc.
Inventor： Asif Iqbal , Somvir Dahiya , Nikhil Jain , Rajan Kapoor , Saleem Mohamedali
CPC classification number: H04W24/02 , H04L12/189 , H04W4/06 , H04W56/00 , H04W56/001 , H04W72/0446 , H04W88/06 , H04W88/10
Abstract: A system or circuit for generating timing events for mobile communications includes fetching network parameters corresponding to a cellular network. The network parameters are used to program a set of programmable registers. The timing events then are generated based on the network parameters. The timing events enable a user equipment (UE) or a base station to operate in multiple cellular networks.
Abstract translation: 用于产生用于移动通信的定时事件的系统或电路包括取得对应于蜂窝网络的网络参数。 网络参数用于对一组可编程寄存器进行编程。 然后，基于网络参数生成定时事件。 定时事件使得用户设备（UE）或基站能够在多个蜂窝网络中操作。
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公开(公告)号：US10261924B2
公开(公告)日：2019-04-16
申请号：US15227834
申请日：2016-08-03
Applicant: FREESCALE SEMICONDUCTOR, INC.
Inventor： Hemant Nautiyal , Rajan Kapoor , Arvind Kaushik , Puneet Khandelwal
Abstract: A communication system for communicating control data between a processor and an interface includes configuration registers, a packet processor, an interrupt processor, a timing monitor, a configuration sampler, a control-frame processor, a mode selector, and a transceiver. The processor, timing monitor, and configuration sampler generate control data, a timing signal and frame structure data, respectively. The packet processor generates a transmit control configuration packet, which includes the control data. The control-frame processor inserts the transmit control configuration packet into a first control frame, outputs the control frame to the interface and extracts a receive-configuration packet from a second control frame for generating one or more interrupts. The mode selector generates mode and idle signals for determining the mode of the interface, based on the idle signal. In one implementation, the system uses JESD control frames to reduce GPIO pin usage.
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公开(公告)号：US20140105185A1
公开(公告)日：2014-04-17
申请号：US13650138
申请日：2012-10-12
Applicant: FREESCALE SEMICONDUCTOR, INC.
Inventor： Asif Iqbal , Somvir Dahiya , Nikhil Jain , Rajan Kapoor , Saleem Mohamedali
CPC classification number: H04W24/02 , H04L12/189 , H04W4/06 , H04W56/00 , H04W56/001 , H04W72/0446 , H04W88/06 , H04W88/10
Abstract: A system or circuit for generating timing events for mobile communications includes fetching network parameters corresponding to a cellular network. The network parameters are used to program a set of programmable registers. The timing events then are generated based on the network parameters. The timing events enable a user equipment (UE) or a base station to operate in multiple cellular networks.
Abstract translation: 用于产生用于移动通信的定时事件的系统或电路包括取得对应于蜂窝网络的网络参数。 网络参数用于对一组可编程寄存器进行编程。 然后，基于网络参数生成定时事件。 定时事件使得用户设备（UE）或基站能够在多个蜂窝网络中操作。
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公开(公告)号：US09788314B2
公开(公告)日：2017-10-10
申请号：US14957618
申请日：2015-12-03
Applicant: FREESCALE SEMICONDUCTOR, INC.
Inventor： Girraj K. Agrawal , Somvir Dahiya , Rajan Kapoor , Arvind Kaushik , Vincent Martinez
CPC classification number: H04W72/042 , H04B1/38 , H04B1/40 , H04B1/44 , H04W88/08
Abstract: A base transceiver station (BTS) includes dedicated memories to store uplink real-time (RT) data received by way of an antenna of the BTS and downlink RT data generated by processors of the BTS. The dedicated memories serve a dedicated number of processors, which prevents over-run and under-run of antenna buffers and provides deterministic data flow necessary to stream time-critical uplink and downlink RT data. Thus, a high and dedicated bandwidth for the uplink and downlink RT data is ensured.
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公开(公告)号：US20170164333A1
公开(公告)日：2017-06-08
申请号：US14957618
申请日：2015-12-03
Applicant: FREESCALE SEMICONDUCTOR, INC.
Inventor： Girraj K. Agrawal , Somvir Dahiya , Rajan Kapoor , Arvind Kaushik , Vincent Martinez
CPC classification number: H04W72/042 , H04B1/38 , H04B1/40 , H04B1/44 , H04W88/08
Abstract: A base transceiver station (BTS) includes dedicated memories to store uplink real-time (RT) data received by way of an antenna of the BTS and downlink RT data generated by processors of the BTS. The dedicated memories serve a dedicated number of processors, which prevents over-run and under-run of antenna buffers and provides deterministic data flow necessary to stream time-critical uplink and downlink RT data. Thus, a high and dedicated bandwidth for the uplink and downlink RT data is ensured.
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