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公开(公告)号：US5251014A
公开(公告)日：1993-10-05
申请号：US894277
申请日：1992-06-04
摘要： In a phase error detector for detecting a phase error .theta. of an input color burst signal from a phase of a reference signal from sin .theta. component and cos .theta. component, if either one of the sin .theta. component and cos .theta. component requires M bits for its expression, the both values are divided by a same value to shift in bits to be expressed in N bits (N
摘要翻译： 在用于从来自sinθ分量和cosθ分量的参考信号的相位检测输入色同步信号的相位误差θ的相位误差检测器中，如果sinθ分量和cosθ分量中的任一个需要M位， 表达式中，将两个值除以相同的值以在N位（N
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2.发明授权Digital phase locked loop for correcting a phase of an output signal with respect to an input signal 失效用于校正输入信号输出信号相位的数字相位锁定环路
公开(公告)号：US5055801A
公开(公告)日：1991-10-08
申请号：US464002
申请日：1990-01-12
申请人： Fumiaki Koga , Tokikazu Matsumoto
发明人： Fumiaki Koga , Tokikazu Matsumoto
CPC分类号： H03L7/093
摘要： A digital phase locked loop for correcting the phase of an output signal with respect to an input signal has a phase comparator for comparing the phases of the input signal and a feedback signal from a variable frequency oscillator. The output signal of the phase comparator representing the phase difference is integrated in a low pass filter. The output of the low pass filter is supplied to a switch which alternately selects between the output of the low pass filter and a zero level signal from a zero generator. The output of the switch is supplied to the variable frequency oscillator. The output signal of the variable frequency oscillator is returned to the phase comparator, so that the phase of the output signal from the variable frequency oscillator is synchronized with the phase of the input signal.
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3.发明授权Video signal processing apparatus having timebase corrector and means for replacing residual error data with specific data 失效具有时基校正器的视频信号处理装置和用特定数据替换残留误差数据的装置
公开(公告)号：US5283660A
公开(公告)日：1994-02-01
申请号：US892122
申请日：1992-06-02
CPC分类号： H04N5/956
摘要： A video signal having a residual error superposed in the horizontal synchronizing signal period is received from a time axis error correcting circuit for suppressing the time axis error of video signal, and the residual error superposed portion is replaced with a specific data.
摘要翻译： 从用于抑制视频信号的时间轴误差的时间轴误差校正电路接收具有叠加在水平同步信号周期中的残留误差的视频信号，并且用特定数据替换剩余误差叠加部分。
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公开(公告)号：US5303061A
公开(公告)日：1994-04-12
申请号：US894923
申请日：1992-06-08
CPC分类号： H04N5/956
摘要： A time base correcting apparatus for reducing hindrance to a carrier chrominance signal due to clock jitter, when a sampling clock is generated by a digital circuit. In the time base correcting apparatus, a video signal is sampled with a clock synchronized with the video signal to be written to an FIFO memory. The video signal is then read out therefrom with a fixed clock to remove time base changes of the video signal. The fixed read clock is generated by multiplying two different frequency signals together, where one of the signals has a lower frequency approximately equal to (n+1/4) f (where n is an arbitrary integer, and f is a horizontal sync frequency) and using one of the resultant sidebands obtained through use of a bandpass filter. The read clock frequency is separated by 1/2 f from the other sideband frequency to reduce hindrance between the signals, and in turn to reduce viewable hindrances during the display of the video signal read out from the FIFO.
摘要翻译： 一种时基校正装置，用于当由数字电路产生采样时钟时，减少由于时钟抖动对载波色度信号的阻碍。 在时基校正装置中，视频信号用与视频信号同步的时钟进行采样，以写入FIFO存储器。 然后以固定的时钟从其读出视频信号，以消除视频信号的时基变化。 固定读时钟通过将两个不同的频率信号相乘在一起而产生，其中一个信号具有近似等于（n + 1/4）f的较低频率（其中n是任意整数，f是水平同步频率） 并使用通过使用带通滤波器获得的所得边带之一。 读取时钟频率与另一个边带频率分开1/2 f，以减少信号之间的障碍，从而减少在从FIFO读出的视频信号的显示期间的可视障碍。
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公开(公告)号：US5657043A
公开(公告)日：1997-08-12
申请号：US423723
申请日：1995-04-18
申请人： Yasuhito Fukui , Tokikazu Matsumoto
发明人： Yasuhito Fukui , Tokikazu Matsumoto
CPC分类号： G09G3/3625
摘要： A driving apparatus for driving a passive matrix liquid crystal display utilizing an active driving method includes an image buffer storage for storing one frame of image data in the form of a matrix to output image data on a column by column basis to produce a rearranged image data. A matrix generator generates row data. A data converter multiplies the rearranged image data with row vectors to produce converted data. A converted data buffer storage stores the converted data and outputs the data on a row by row basis to produce a column data. A LCD driver is provided for producing a column signal based on the column data and a row signal based on the row data, and further for applying these row and column signals to row and column electrodes, respectively, to drive the LCD.
摘要翻译： 利用主动驱动方法驱动无源矩阵液晶显示器的驱动装置包括图像缓冲存储器，用于存储矩阵形式的一帧图像数据以逐列输出图像数据，以产生重新排列的图像数据 。 矩阵生成器生成行数据。 数据转换器将重新排列的图像数据与行向量相乘以产生转换的数据。 经转换的数据缓冲存储器存储转换的数据，并逐行输出数据以产生列数据。 提供LCD驱动器，用于基于列数据和基于行数据的行信号产生列信号，并且还用于分别将这些行和列信号施加到行电极和列电极以驱动LCD。
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公开(公告)号：US4959616A
公开(公告)日：1990-09-25
申请号：US255267
申请日：1988-10-11
申请人： Tokikazu Matsumoto
发明人： Tokikazu Matsumoto
CPC分类号： G06F7/68 , G06F1/0335 , G06F7/548 , H03K4/026
摘要： A digital oscillation apparatus includes a data generator and an accumulator which function as follows. The data generator is responsive to each clock of a clock signal having a frequency fc for generating data used to generate a data string which has a total value R (R is an integer) in a repetition period of m clocks (m is an integer). Accordingly, the average value of each data of the data string generated in response to each clock becomes R/m. The accumulator has a dynamic range D (D is an integer) and is responsive to each clock of the clock signal for accumulating a sum of each data (average value=R/m) of the data string generated by the data generator and a constant A (A is an integer) until the accumulated result exceeds the dynamic range. That is, data having an average value A+R/m is accumulated in response to each clock of the clock signal. When the accumulated result exceeds the dynamic range D, the accumulator subtracts the dynamic range D from the accumulated result, or resets the accumulated result. If the values of R, m, A and D are set to satisfy a relationship of fs/fc= (A+R/m)D, where fs is a frequency of a periodic waveform data to be generated as an output of the apparatus, the accumulator generates periodic waveform data having a frequency fs=(A+R/m).multidot.fc/D.
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公开(公告)号：US4623940A
公开(公告)日：1986-11-18
申请号：US525567
申请日：1983-08-22
摘要： A magnetic reproducing apparatus which has a pair of main rotatable heads having different azimuth angles and a pair of auxiliary rotatable heads having different azimuth angles. When a magnetic tape is played back while it runs at a speed different from that at which it runs during a recording mode, playback output signals from the main and auxiliary rotatable heads are switched over to replace a reduction in the outputs from the main rotatable heads with the outputs from the auxiliary rotatable heads to produce a combined playback output signal. The combined playback output signal is passed through a variable delay line having a delay time varied by an output from a detector circuit which detects variations in horizontal synchronous signal intervals of the combined playback output signal. This varied delay time of the variable delay line can eliminate any skew distortions which would appear on a displayed image on the screen due to the variations in horizontal synchronous signal intervals of the combined playback output signal.
摘要翻译： 具有一对具有不同方位角的主旋转头和具有不同方位角的一对辅助旋转头的磁再现装置。 当磁带在与记录模式期间运行的速度不同的速度下播放时，来自主旋转磁头和辅助旋转磁头的重放输出信号被切换以替代来自主旋转磁头的输出的减小 与来自辅助可旋转头的输出产生组合的重放输出信号。 组合的重放输出信号通过可变延迟线，该可变延迟线具有由检测器电路的输出变化的延迟时间，该检测器电路检测组合的重放输出信号的水平同步信号间隔的变化。 可变延迟线的这种变化的延迟时间可以消除由于组合的重放输出信号的水平同步信号间隔的变化而在屏幕上显示的图像上出现的任何偏斜失真。
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8.发明授权
公开(公告)号：US5220411A
公开(公告)日：1993-06-15
申请号：US713156
申请日：1991-06-11
CPC分类号： H04N9/896 , H04N9/8715
摘要： In a system for eliminating time base fluctuation of a video signal having a synchronizing signal and a burst reproduced from a video disk, for example, the synchronism is first coarsely pulled in on the basis of the horizontal synchronizing signal and then precisely follows the time base fluctuation on the basis of the burst signal. A shift of the output synchronizing signal is corrected by using a phase detection of an input horizontal synchronizing signal when an output synchronizing signal is produced on the basis of the read address of a memory for eliminating time base fluctuation, thereby preventing, for example, a superimposed character using the output synchronizing signal from fluctuating on a picture.
摘要翻译： 在用于消除具有同步信号和从视频盘再现的脉冲串的视频信号的时基波动的系统中，例如，首先根据水平同步信号粗略地拉入同步，然后精确地跟随时基 基于突发信号的波动。 基于用于消除时基波动的存储器的读取地址产生输出同步信号时，通过使用输入水平同步信号的相位检测来校正输出同步信号的偏移，从而防止例如 使用来自图像上的波动的输出同步信号的叠加字符。
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9.发明授权Method of reproducing a chrominance signal from a previously low-range-converted chrominance signal using comb filtering and sampling 失效使用梳状滤波和采样从先前低范围转换的色度信号再现色度信号的方法
公开(公告)号：US4754340A
公开(公告)日：1988-06-28
申请号：US666375
申请日：1984-10-30
申请人： Yukio Nakagawa , Masao Tomita , Tokikazu Matsumoto
发明人： Yukio Nakagawa , Masao Tomita , Tokikazu Matsumoto
CPC分类号： H04N9/8707 , H04N9/831
摘要： A low-range-converted chrominance signal is demodulated into two color difference signals. The two color difference signals are each filtered by a comb filter to eliminate undesired components. The two color difference signals, having been filtered, are modulated to obtain a carrier chrominance signal having a prescribed carrier frequency. To be suitable for digital signal processing, the low-range-converted chrominance signal is sampled at a first frequency which is an integral multiple of a low-range-converted carrier frequency of the low-range-converted chrominance signal when being demodulated. The two color difference signals are sampled at a second frequency which is an integral multiple of the prescribed carrier frequency of the carrier chrominance signal.
摘要翻译： 低范围转换的色度信号被解调成两个色差信号。 两个色差信号都被梳状滤波器滤波以消除不期望的分量。 被滤波的两个色差信号被调制以获得具有规定载波频率的载波色度信号。 为了适合于数字信号处理，低频转换色度信号在被解调时以低范围转换色度信号的低范围转换载波频率的整数倍的第一频率被采样。 两个色差信号以作为载波色度信号的规定载波频率的整数倍的第二频率被采样。
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公开(公告)号：US4989074A
公开(公告)日：1991-01-29
申请号：US410261
申请日：1989-09-21
申请人： Tokikazu Matsumoto
发明人： Tokikazu Matsumoto
IPC分类号： H03G3/20
CPC分类号： H03G3/20
摘要： A digital automatic gain control apparatus is provided which controls gain such that when an analog video signal is converted into digital signals for processing, the input of the A-D converter is maintained at a fixed level, and after the analog signal has been converted into digital form, the output of the digital system circuit is also maintained at a fixed level. In this apparatus, an input signal is passed through an analog variable gain amplifier, the signal is converted into digital form, and the output of an A-D converter is passed through a digital variable gain amplifier. The amplitude level of the output of the digital variable gain amplifier is detected by an amplitude detecting unit and is controlled so as to be equal to a specified reference value. At this time, the analog variable gain amplifier is controlled so that the level of the control signal for controlling the digital variable gain amplifier is equal to a specified reference value, thereby maintaining the signal of the A-D converter at a fixed level. Gain control of the analog signal system and the digital signal system, before and after the A-D converter, is effected by a single amplitude detecting unit.
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