公开(公告)号：US08952748B2

公开(公告)日：2015-02-10

申请号：US13872727

申请日：2013-04-29

Applicant: FutureWei Technologies, Inc.

Inventor： Homero Guimaraes ,  Matthew Richard Miller

IPC: H03K17/16 ,  H03K17/687 ,  H01L29/92 ,  G08C19/00 ,  H01L49/02

CPC classification number: G08C19/00 ,  H01L27/0805 ,  H01L28/40 ,  H01L29/94

Abstract: An embodiment integrated circuit includes a first capacitive element including a first metal-oxide-semiconductor (MOS) capacitor and a second capacitive element coupled in parallel with the first capacitive element, where the second capacitive element includes a second MOS capacitor. Also, the integrated circuit includes a third capacitive element coupled in parallel with the first capacitive element and the second capacitive element, where the third capacitive element includes a first metal-insulator-metal (MIM) capacitor and a fourth capacitive element coupled in parallel with the first capacitive element, the second capacitive element, and the third capacitive element, where the fourth capacitive element includes a second MIM capacitor.

Abstract translation: 实施例集成电路包括第一电容元件，其包括与第一电容元件并联耦合的第一金属氧化物半导体（MOS）电容器和第二电容元件，其中第二电容元件包括第二MOS电容器。 此外，集成电路包括与第一电容元件和第二电容元件并联耦合的第三电容元件，其中第三电容元件包括第一金属 - 绝缘体金属（MIM）电容器和与第 第一电容元件，第二电容元件和第三电容元件，其中第四电容元件包括第二MIM电容器。

公开(公告)号：US20140266408A1

公开(公告)日：2014-09-18

申请号：US13872727

申请日：2013-04-29

Applicant: FUTUREWEI TECHNOLOGIES, INC.

Inventor： Homero Guimaraes ,  Matthew Richard Miller

IPC: G08C19/00 ,  H01L49/02

CPC classification number: G08C19/00 ,  H01L27/0805 ,  H01L28/40 ,  H01L29/94

Abstract: An embodiment integrated circuit includes a first capacitive element including a first metal-oxide-semiconductor (MOS) capacitor and a second capacitive element coupled in parallel with the first capacitive element, where the second capacitive element includes a second MOS capacitor. Also, the integrated circuit includes a third capacitive element coupled in parallel with the first capacitive element and the second capacitive element, where the third capacitive element includes a first metal-insulator-metal (MIM) capacitor and a fourth capacitive element coupled in parallel with the first capacitive element, the second capacitive element, and the third capacitive element, where the fourth capacitive element includes a second MIM capacitor.

Abstract translation: 实施例集成电路包括第一电容元件，其包括与第一电容元件并联耦合的第一金属氧化物半导体（MOS）电容器和第二电容元件，其中第二电容元件包括第二MOS电容器。 此外，集成电路包括与第一电容元件和第二电容元件并联耦合的第三电容元件，其中第三电容元件包括第一金属 - 绝缘体金属（MIM）电容器和与第 第一电容元件，第二电容元件和第三电容元件，其中第四电容元件包括第二MIM电容器。