公开(公告)号：US20040087296A1

公开(公告)日：2004-05-06

申请号：US10689932

申请日：2003-10-22

Applicant: GCT Semiconductor, Inc.

Inventor： Joonbae Park ,  Kyeongho Lee

IPC: H04B001/10

CPC classification number: H04B1/109

Abstract: A communications receiver includes a baseband signal recovery circuit which uses a low-IF architecture for data reception. The baseband signal recovery circuit uses a full-analog implementation for channel selection and filtering. Thus, the overhead placed on the design of analog-to-digital converter is greatly relaxed and most of hardware can be re-used for multi-mode applications with only a slight modification.

Abstract translation: 通信接收机包括使用低IF架构进行数据接收的基带信号恢复电路。 基带信号恢复电路使用全模拟实现进行信道选择和滤波。 因此，放置在模数转换器设计上的开销大大放松，大多数硬件可以重新用于多模式应用，只需稍作修改。

公开(公告)号：US20030227340A1

公开(公告)日：2003-12-11

申请号：US10443835

申请日：2003-05-23

Applicant: GCT Semiconductor, Inc.

Inventor： Yido Koo ,  Jeong-Woo Lee ,  Joonbae Park ,  Kyeongho Lee

IPC: H03B001/00

CPC classification number: H03L7/099 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1265 ,  H03B2201/025 ,  H03J2200/10

Abstract: A voltage-controlled oscillator including an active oscillator circuit, an inductor, and capacitive circuits is disclosed. The capacitive circuits are selectively turned on and off to control the frequency of the voltage-controlled oscillator. Particularly, the inductor and the capacitors in the capacitive circuits form LC circuits that provide feedback to the active oscillator circuit. To avoid damage to the switches in the capacitive circuits, the capacitive circuits further comprise resistors. The resistors can be configured in several different ways so that the voltage-controlled oscillator can have a high degree of reliability, and a wide tuning range with constant phase noise performance.

Abstract translation: 公开了一种包括有源振荡器电路，电感器和电容电路的压控振荡器。 电容电路选择性地导通和截止以控制压控振荡器的频率。 特别地，电容电路中的电感器和电容器形成LC电路，向有源振荡器电路提供反馈。 为了避免损坏电容电路中的开关，电容电路还包括电阻器。 电阻器可以以几种不同的方式配置，使得压控振荡器可以具有高可靠性，以及具有恒定相位噪声性能的宽调谐范围。

公开(公告)号：US20030020521A1

公开(公告)日：2003-01-30

申请号：US10253534

申请日：2002-09-25

Applicant: GCT Semiconductor, Inc.

Inventor： Kyeongho Lee ,  Deog-Kyoon Jeong ,  Joonbae Park ,  Wonchan Kim

IPC: H03B019/00

CPC classification number: H04B1/403 ,  H03F2200/372 ,  H03H11/22 ,  H03H2011/0494 ,  H03K9/00 ,  H03L7/0891 ,  H03L7/0995 ,  H03L7/1974 ,  H04B1/18 ,  H04B1/28 ,  H04B1/40

Abstract: A single chip RF communication system and method is provided including a transmitter and a receiver. The RF communication system in accordance with the present invention can include an antenna that receives/transmits RF signals, a PLL that generates multi-phase clock signals having a frequency different from a carrier frequency and a reference signal having the carrier frequency, a demodulation-mixer that mixes the received RF signals with the multi-phase clock signals having the frequency different from the carrier frequency to output signals having a frequency reduced relative to the carrier frequency, two stage amplification that amplifies a selected channel signal to a required dynamic level, and an A/D converting unit for converting the RF signals from the mixing unit into digital signals. The two stage amplification can provide the selected channel signal with sufficient gain, even when an adjacent channel signal is output by the demodulation mixer with greater amplitude or power.

公开(公告)号：US20020190796A1

公开(公告)日：2002-12-19

申请号：US10196136

申请日：2002-07-17

Applicant: GCT Semiconductor, Inc.

Inventor： Joonbae Park ,  Hoe-Sam Jeong ,  Seung-Wook Lee ,  Won-Seok Lee ,  Kyeongho Lee

IPC: H03G003/10

CPC classification number: H03F1/223 ,  H03F3/195 ,  H03F3/72 ,  H03F2200/294 ,  H03F2200/378 ,  H03F2200/391 ,  H03F2200/451 ,  H03F2203/7236 ,  H03G1/0088

Abstract: A variable gain, low noise amplifier is described, which is suitable as the input amplifier for a wireless terminal, or as the pre-amplifier stage of a wireless terminal transmitter. The amplifier may achieve variable gain by deploying a network of transistors in a parallel array, each independently selectable by a PMOS switch, and providing the variable resistance for the resonant circuit. Power dissipation can also be mitigated by using a network of driving transistors, each independently selectable by a PMOS switch. The resonant frequency of the amplifier may be made tunable by providing a selection of optional pull-up capacitors.

Abstract translation: 描述了可变增益低噪声放大器，其适用于无线终端的输入放大器，或作为无线终端发射机的前置放大器级。 放大器可以通过以并联阵列布置晶体管网络来实现可变增益，每个晶体管可由PMOS开关独立选择，并为谐振电路提供可变电阻。 也可以通过使用驱动晶体管的网络来减轻功耗，每个驱动晶体管都可以由PMOS开关独立选择。 可以通过提供可选的上拉电容器的选择来使放大器的谐振频率可调。

公开(公告)号：US20040085103A1

公开(公告)日：2004-05-06

申请号：US10689986

申请日：2003-10-22

Applicant: GCT Semiconductor, Inc.

Inventor： Youngho Ahn ,  Eunseok Song ,  Yido Koo ,  Jeong-Woo Lee ,  Joonbae Park ,  Kyeongho Lee

IPC: H03L007/06

CPC classification number: H03L7/1978

Abstract: A system and method for improving the signal-to-noise ratio of a frequency generator suppresses phase noise and noise generated from mismatches in the internal generator circuits. This is accomplished using a modulation scheme which shifts spurious noise signals outside the loop bandwidth of the generator. When shifted in this manner, the noise signals maybe removed entirely or to any desired degree using, for example, a filter located along the signal path of the generator. In one embodiment, a Sigma-Delta modulator controls the value of a pulse-swallow frequency divider situated along a feedback path of a phase-locked loop to achieve a desired level of noise suppression. In another embodiment, a reference signal input into a phase-locked loop is modulated to effect noise suppression. In another embodiment, the foregoing forms of modulation are combined to accomplish the desired frequency shift. Through these modulation techniques, the signal-to-noise ratio of the frequency generator may be substantially improved while simultaneously achieving faster lock times.

Abstract translation: 用于提高频率发生器的信噪比的系统和方法抑制由内部发生器电路中的失配产生的相位噪声和噪声。 这是使用将发生器的环路带宽之外的杂散噪声信号移位的调制方案来实现的。 当以这种方式移位时，噪声信号可以使用例如沿着发生器的信号路径定位的滤波器被完全去除或达到任何期望的程度。 在一个实施例中，Σ-Δ调制器控制沿着锁相环路的反馈路径设置的脉冲吞咽分频器的值，以实现期望的噪声抑制水平。 在另一个实施例中，输入到锁相环的参考信号被调制以实现噪声抑制。 在另一个实施例中，组合上述形式的调制以实现期望的频移。 通过这些调制技术，可以显着提高频率发生器的信噪比，同时实现更快的锁定时间。

公开(公告)号：US20040023624A1

公开(公告)日：2004-02-05

申请号：US10207986

申请日：2002-07-31

Applicant: GCT Semiconductor, Inc.

Inventor： Eunseok Song ,  Seung-Wook Lee ,  Jeong-Woo Lee ,  Joonbae Park ,  Kyeongho Lee

IPC: H04B001/04

CPC classification number: H04B1/28 ,  H04B1/525

Abstract: A method and apparatus that provide a frequency conversion in a radio frequency front-end are disclosed, including a frequency divider that divides an input signal frequency by a predetermined value to produce an output signal frequency; and a frequency mixer that mixes the output signal frequency with a carrier signal frequency to produce a converted signal frequency, which is substantially equal to a difference between the output signal frequency and the carrier signal frequency. The predetermined value and the input signal frequency are selected such that the carrier signal frequency is not substantially equivalent to an integer multiple of the output signal frequency. The method and apparatus can be used in a wireless communication receiver including wireless communication systems and wireless LAN systems.

Abstract translation: 公开了一种在射频前端提供频率转换的方法和装置，包括将输入信号频率除以预定值以产生输出信号频率的分频器; 以及混频器，其将输出信号频率与载波信号频率进行混合，以产生基本上等于输出信号频率和载波信号频率之差的转换信号频率。 选择预定值和输入信号频率使得载波信号频率基本上不等于输出信号频率的整数倍。 该方法和装置可用于包括无线通信系统和无线LAN系统的无线通信接收机。

公开(公告)号：US20040086057A1

公开(公告)日：2004-05-06

申请号：US10284342

申请日：2002-10-31

Applicant: GCT Semiconductor, Inc.

Inventor： Kang-Yoon Lee ,  Eunseok Song ,  Jeong Woo Lee ,  Joonbae Park ,  Kyeongho Lee

IPC: H04L027/20 ,  H04L027/04 ,  H04L027/12

CPC classification number: H03C3/0966 ,  H03C3/0933

Abstract: A translational-loop transmitter generates RF signals using at most one phase-locked-loop (PLL) circuit. In one embodiment, a single PLL generates two local oscillation signals. The first oscillation signal is mixed with a baseband signal to generate an intermediate frequency signal. The second oscillation signal is input into the translational loop to adjust a voltage-controlled oscillator to the desired carrier frequency. In order to perform this type of modulation, the frequencies of the local oscillation signals are set so that they are harmonically related to one another relative to the carrier frequency. Other embodiments generate only one oscillation signal. Under these conditions, the intermediate frequency signal is generated using the oscillation signal, and a frequency divider in the translational loop is used to generate a control signal for adjusting the voltage-controlled oscillator to the carrier frequency. In still other embodiments, a transmitter signal is generated without using any phase-locked-loop circuits. This is accomplished by generating an intermediate frequency signal using a crystal oscillator, and then using a frequency divider in a feedback loop to generate a control signal for adjusting the voltage-controlled oscillator to the carrier frequency. By minimizing the number of phase-locked-loop circuits in the transmitter, the size, cost, and power requirements of mobile handsets may be significantly reduced.

Abstract translation: 平移环路发射器使用至多一个锁相环（PLL）电路产生RF信号。 在一个实施例中，单个PLL产生两个本地振荡信号。 第一振荡信号与基带信号混合以产生中频信号。 第二振荡信号被输入到平移回路中，以将压控振荡器调整到期望的载波频率。 为了执行这种类型的调制，本地振荡信号的频率被设置为使得它们相对于载波频率彼此谐波相关。 其他实施例仅产生一个振荡信号。 在这些条件下，使用振荡信号产生中频信号，并且使用平移环路中的分频器产生用于将压控振荡器调节到载波频率的控制信号。 在其他实施例中，产生发射机信号而不使用任何锁相环电路。 这是通过使用晶体振荡器产生中频信号，然后在反馈环路中使用分频器来产生用于将压控振荡器调节到载波频率的控制信号来实现的。 通过最小化发射机中的锁相环电路的数量，移动手机的尺寸，成本和功率要求可能会大大降低。

公开(公告)号：US20020142745A1

公开(公告)日：2002-10-03

申请号：US09940637

申请日：2001-08-29

Applicant: GCT Semiconductor, Inc.

Inventor： Suwon Kang ,  Jeong-Woo Lee ,  Joonbae Park

IPC: H04B001/06

CPC classification number: H03G3/3068

Abstract: A wireless or wired communication system and method is provided including a transmitter and a receiver. A RF communication system in accordance with the present invention includes an apparatus and gain control method between RF receiver and baseband modem in case of a plurality of gain stages inside a receiver. The gain of each stage can be controlled by an integrated gain controller. The gain controller monitors the signal level of each gain stage to place its gain to optimal value. The gain control apparatus and method can be implemented in a digital AGC system. The gain controller accepts a signal implementing gain control and thus there is no stability issue. When distributed gain stages are present inside a related art receiver and separate gain control loops are used, stability issues can arise. In a preferred embodiment of an apparatus and method, the baseband modem decides the amount of gain control and adjusts the gain of certain gain stages by the proper amount.

Abstract translation: 提供了包括发射机和接收机的无线或有线通信系统和方法。 根据本发明的RF通信系统在接收机内的多个增益级的情况下包括RF接收机和基带调制解调器之间的装置和增益控制方法。 每个阶段的增益可以由集成增益控制器控制。 增益控制器监视每个增益级的信号电平，将其增益置于最佳值。 增益控制装置和方法可以在数字AGC系统中实现。 增益控制器接受实现增益控制的信号，因此没有稳定性问题。 当分布式增益级存在于相关技术的接收机内并且使用单独的增益控制回路时，可能会出现稳定性问题。 在装置和方法的优选实施例中，基带调制解调器确定增益控制量并且将某些增益级的增益调整适当的量。

公开(公告)号：US20020136342A1

公开(公告)日：2002-09-26

申请号：US09940808

申请日：2001-08-29

Applicant: GCT Semiconductor, Inc.

Inventor： Jeongwoo Lee ,  Yido Koo ,  Kang Yoon Lee ,  Eunseok Song ,  Hyungki Huh ,  Joonbae Park

IPC: H03D003/24 ,  H03L007/06

CPC classification number: H03L7/0898 ,  H03L7/087 ,  H03L7/095 ,  H03L7/1976

Abstract: A phase-locked loop (PLL) fractional-N type frequency synthesizer incorporates a sample-and-hold circuit. The synthesizer can reduce circuit size by eliminating a loop filter. Further, the synthesizer can incorporate fractional spur compensation circuitry to compensate charge pump ripple whenever a charge pump operates. The synthesizer or fractional-N type PLL can use a divider and at least two phase detectors coupled to a sample-and-hold circuit. A lock detecting circuit can initially determine a reference voltage for the sample-and-hold circuit. Also, fractional compensation is accomplished dynamically and in a manner that is robust to environmental changes while a control voltage is stably maintained for the voltage controlled oscillator.

Abstract translation: 锁相环（PLL）小数N型频率合成器包含采样保持电路。 合成器可以通过消除环路滤波器来减小电路尺寸。 此外，合成器可以包括分数支路补偿电路，以便在电荷泵工作时补偿电荷泵波动。 合成器或分数N型PLL可以使用分频器和耦合到采样和保持电路的至少两个相位检测器。 锁定检测电路可以最初确定采样和保持电路的参考电压。 此外，分数补偿是动态地实现的，并且以对于环境变化是稳健的方式实现，同时稳定地维持用于压控振荡器的控制电压。

公开(公告)号：US20020136341A1

公开(公告)日：2002-09-26

申请号：US09940807

申请日：2001-08-29

Applicant: GCT Semiconductor, Inc.

Inventor： Hyungki Huh ,  Eunseok Song ,  Kang Yoon Lee ,  Yido Koo ,  Jeongwoo Lee ,  Joonbae Park

IPC: H03D003/24

CPC classification number: H03L7/087 ,  H03L7/0898 ,  H03L7/1976

Abstract: A phase-locked loop (PLL) frequency synthesizer incorporates fractional spur compensation circuitry. This fractional spur compensation circuitry dynamically compensates charge pump ripple whenever a charge pump operates. It can utilize a programmable divider, two phase detectors each using a charge pump stage pumps. A fractional accumulator stage determines the number of charge pumps that operate during a phase comparison. The PLL frequency synthesizer avoids the need for compensation current trimming. Also, fractional compensation is accomplished dynamically and in a manner that is robust to environmental changes.

Abstract translation: 锁相环（PLL）频率合成器包含分数支路补偿电路。 当电荷泵运行时，这个分数支路补偿电路会动态地补偿电荷泵波动。 它可以使用可编程分压器，每个使用电荷泵级泵的两相检测器。 分级累加器级确定在相位比较期间操作的电荷泵的数量。 PLL频率合成器避免了补偿电流修整的需要。 此外，分数补偿是以对环境变化稳健的方式动态完成的。