LC oscillator with wide tuning range and low phase noise
    1.
    发明申请
    LC oscillator with wide tuning range and low phase noise 有权
    LC振荡器具有宽调谐范围和低相位噪声

    公开(公告)号:US20030227340A1

    公开(公告)日:2003-12-11

    申请号:US10443835

    申请日:2003-05-23

    Abstract: A voltage-controlled oscillator including an active oscillator circuit, an inductor, and capacitive circuits is disclosed. The capacitive circuits are selectively turned on and off to control the frequency of the voltage-controlled oscillator. Particularly, the inductor and the capacitors in the capacitive circuits form LC circuits that provide feedback to the active oscillator circuit. To avoid damage to the switches in the capacitive circuits, the capacitive circuits further comprise resistors. The resistors can be configured in several different ways so that the voltage-controlled oscillator can have a high degree of reliability, and a wide tuning range with constant phase noise performance.

    Abstract translation: 公开了一种包括有源振荡器电路,电感器和电容电路的压控振荡器。 电容电路选择性地导通和截止以控制压控振荡器的频率。 特别地,电容电路中的电感器和电容器形成LC电路,向有源振荡器电路提供反馈。 为了避免损坏电容电路中的开关,电容电路还包括电阻器。 电阻器可以以几种不同的方式配置,使得压控振荡器可以具有高可靠性,以及具有恒定相位噪声性能的宽调谐范围。

    Single chip CMOS transmitter/receiver and method of using same

    公开(公告)号:US20030020521A1

    公开(公告)日:2003-01-30

    申请号:US10253534

    申请日:2002-09-25

    Abstract: A single chip RF communication system and method is provided including a transmitter and a receiver. The RF communication system in accordance with the present invention can include an antenna that receives/transmits RF signals, a PLL that generates multi-phase clock signals having a frequency different from a carrier frequency and a reference signal having the carrier frequency, a demodulation-mixer that mixes the received RF signals with the multi-phase clock signals having the frequency different from the carrier frequency to output signals having a frequency reduced relative to the carrier frequency, two stage amplification that amplifies a selected channel signal to a required dynamic level, and an A/D converting unit for converting the RF signals from the mixing unit into digital signals. The two stage amplification can provide the selected channel signal with sufficient gain, even when an adjacent channel signal is output by the demodulation mixer with greater amplitude or power.

    Variable gain low-noise amplifier for a wireless terminal
    3.
    发明申请
    Variable gain low-noise amplifier for a wireless terminal 有权
    用于无线终端的可变增益低噪声放大器

    公开(公告)号:US20020190796A1

    公开(公告)日:2002-12-19

    申请号:US10196136

    申请日:2002-07-17

    Abstract: A variable gain, low noise amplifier is described, which is suitable as the input amplifier for a wireless terminal, or as the pre-amplifier stage of a wireless terminal transmitter. The amplifier may achieve variable gain by deploying a network of transistors in a parallel array, each independently selectable by a PMOS switch, and providing the variable resistance for the resonant circuit. Power dissipation can also be mitigated by using a network of driving transistors, each independently selectable by a PMOS switch. The resonant frequency of the amplifier may be made tunable by providing a selection of optional pull-up capacitors.

    Abstract translation: 描述了可变增益低噪声放大器,其适用于无线终端的输入放大器,或作为无线终端发射机的前置放大器级。 放大器可以通过以并联阵列布置晶体管网络来实现可变增益,每个晶体管可由PMOS开关独立选择,并为谐振电路提供可变电阻。 也可以通过使用驱动晶体管的网络来减轻功耗,每个驱动晶体管都可以由PMOS开关独立选择。 可以通过提供可选的上拉电容器的选择来使放大器的谐振频率可调。

    Radio receiver and method for AM suppression and DC-offset removal
    4.
    发明申请
    Radio receiver and method for AM suppression and DC-offset removal 审中-公开
    无线电接收机和AM抑制和DC-offset去除方法

    公开(公告)号:US20040087296A1

    公开(公告)日:2004-05-06

    申请号:US10689932

    申请日:2003-10-22

    CPC classification number: H04B1/109

    Abstract: A communications receiver includes a baseband signal recovery circuit which uses a low-IF architecture for data reception. The baseband signal recovery circuit uses a full-analog implementation for channel selection and filtering. Thus, the overhead placed on the design of analog-to-digital converter is greatly relaxed and most of hardware can be re-used for multi-mode applications with only a slight modification.

    Abstract translation: 通信接收机包括使用低IF架构进行数据接收的基带信号恢复电路。 基带信号恢复电路使用全模拟实现进行信道选择和滤波。 因此,放置在模数转换器设计上的开销大大放松,大多数硬件可以重新用于多模式应用,只需稍作修改。

    Gm-C tuning circuit with filter configuration
    5.
    发明申请
    Gm-C tuning circuit with filter configuration 有权
    具有滤波器配置的Gm-C调谐电路

    公开(公告)号:US20020135417A1

    公开(公告)日:2002-09-26

    申请号:US10113600

    申请日:2002-04-02

    Abstract: A tuning circuit for an RF communications system and method includes a master block that outputs a control signal to a slave block. The master block can include a first filter having a high pass filter and a low pass filter that each receive the control signal, a first rectifier coupled to the high pass filter, a second rectifier coupled to the low pass filter, and a converter coupled to the first and second rectifiers that outputs the control signal. The first filter is preferably a gm-C poly-phase filter. Output signals of the gm-C poly-phase filter include high and low pass filtering signals resulting from similarly configured circuits so that the output signals have the same electrical characteristics, which results in an increased accuracy, for example, in a cut-off frequency.

    Abstract translation: 用于RF通信系统和方法的调谐电路包括将控制信号输出到从块的主块。 主块可以包括具有高通滤波器和低通滤波器的第一滤波器,每个接收控制信号,耦合到高通滤波器的第一整流器,耦合到低通滤波器的第二整流器和耦合到 输出控制信号的第一和第二整流器。 第一过滤器优选为gm-C多相过滤器。 gm-C多相滤波器的输出信号包括由类似配置的电路产生的高通滤波信号和低通滤波信号,使得输出信号具有相同的电特性,这导致例如在截止频率 。

    Communication transmitter using offset phase-locked-loop
    6.
    发明申请
    Communication transmitter using offset phase-locked-loop 失效
    通信发射机使用偏移锁相环

    公开(公告)号:US20040086057A1

    公开(公告)日:2004-05-06

    申请号:US10284342

    申请日:2002-10-31

    CPC classification number: H03C3/0966 H03C3/0933

    Abstract: A translational-loop transmitter generates RF signals using at most one phase-locked-loop (PLL) circuit. In one embodiment, a single PLL generates two local oscillation signals. The first oscillation signal is mixed with a baseband signal to generate an intermediate frequency signal. The second oscillation signal is input into the translational loop to adjust a voltage-controlled oscillator to the desired carrier frequency. In order to perform this type of modulation, the frequencies of the local oscillation signals are set so that they are harmonically related to one another relative to the carrier frequency. Other embodiments generate only one oscillation signal. Under these conditions, the intermediate frequency signal is generated using the oscillation signal, and a frequency divider in the translational loop is used to generate a control signal for adjusting the voltage-controlled oscillator to the carrier frequency. In still other embodiments, a transmitter signal is generated without using any phase-locked-loop circuits. This is accomplished by generating an intermediate frequency signal using a crystal oscillator, and then using a frequency divider in a feedback loop to generate a control signal for adjusting the voltage-controlled oscillator to the carrier frequency. By minimizing the number of phase-locked-loop circuits in the transmitter, the size, cost, and power requirements of mobile handsets may be significantly reduced.

    Abstract translation: 平移环路发射器使用至多一个锁相环(PLL)电路产生RF信号。 在一个实施例中,单个PLL产生两个本地振荡信号。 第一振荡信号与基带信号混合以产生中频信号。 第二振荡信号被输入到平移回路中,以将压控振荡器调整到期望的载波频率。 为了执行这种类型的调制,本地振荡信号的频率被设置为使得它们相对于载波频率彼此谐波相关。 其他实施例仅产生一个振荡信号。 在这些条件下,使用振荡信号产生中频信号,并且使用平移环路中的分频器产生用于将压控振荡器调节到载波频率的控制信号。 在其他实施例中,产生发射机信号而不使用任何锁相环电路。 这是通过使用晶体振荡器产生中频信号,然后在反馈环路中使用分频器来产生用于将压控振荡器调节到载波频率的控制信号来实现的。 通过最小化发射机中的锁相环电路的数量,移动手机的尺寸,成本和功率要求可能会大大降低。

    Single chip CMOS transmitter/receiver
    7.
    发明申请
    Single chip CMOS transmitter/receiver 有权
    单芯片CMOS发射器/接收器

    公开(公告)号:US20010048715A1

    公开(公告)日:2001-12-06

    申请号:US09897975

    申请日:2001-07-05

    Abstract: A single chip RF communication system and method is provided including a transmitter and a receiver. The RF communication system in accordance with the present invention includes an antenna for receiving transmitting RF signals, a PLL for generating multi-phase clock signals having a frequency different from a carrier frequency in response to the multi-phase clock signals and a reference signal having the carrier frequency, a demodulation-mixing unit for mixing the received RF signals with the multi-phase clock signals having the frequency different from the carrier frequency to output the RF signals having a frequency reduced by the carrier frequency and an A/D converting unit for converting the RF signals from the mixing unit into digital signals.

    Abstract translation: 提供了包括发射机和接收机的单芯片RF通信系统和方法。 根据本发明的RF通信系统包括用于接收发射RF信号的天线,用于响应于多相时钟信号产生具有与载波频率不同的频率的多相时钟信号的PLL和具有 载波频率,用于将接收到的RF信号与具有与载波频率不同的频率的多相时钟信号混合的解调混合单元,以输出具有被载波频率减小的频率的RF信号和A / D转换单元 用于将来自混合单元的RF信号转换成数字信号。

    System and method for suppressing noise in a phase-locked loop circuit
    8.
    发明申请
    System and method for suppressing noise in a phase-locked loop circuit 有权
    用于抑制锁相环电路中的噪声的系统和方法

    公开(公告)号:US20040085103A1

    公开(公告)日:2004-05-06

    申请号:US10689986

    申请日:2003-10-22

    CPC classification number: H03L7/1978

    Abstract: A system and method for improving the signal-to-noise ratio of a frequency generator suppresses phase noise and noise generated from mismatches in the internal generator circuits. This is accomplished using a modulation scheme which shifts spurious noise signals outside the loop bandwidth of the generator. When shifted in this manner, the noise signals maybe removed entirely or to any desired degree using, for example, a filter located along the signal path of the generator. In one embodiment, a Sigma-Delta modulator controls the value of a pulse-swallow frequency divider situated along a feedback path of a phase-locked loop to achieve a desired level of noise suppression. In another embodiment, a reference signal input into a phase-locked loop is modulated to effect noise suppression. In another embodiment, the foregoing forms of modulation are combined to accomplish the desired frequency shift. Through these modulation techniques, the signal-to-noise ratio of the frequency generator may be substantially improved while simultaneously achieving faster lock times.

    Abstract translation: 用于提高频率发生器的信噪比的系统和方法抑制由内部发生器电路中的失配产生的相位噪声和噪声。 这是使用将发生器的环路带宽之外的杂散噪声信号移位的调制方案来实现的。 当以这种方式移位时,噪声信号可以使用例如沿着发生器的信号路径定位的滤波器被完全去除或达到任何期望的程度。 在一个实施例中,Σ-Δ调制器控制沿着锁相环路的反馈路径设置的脉冲吞咽分频器的值,以实现期望的噪声抑制水平。 在另一个实施例中,输入到锁相环的参考信号被调制以实现噪声抑制。 在另一个实施例中,组合上述形式的调制以实现期望的频移。 通过这些调制技术,可以显着提高频率发生器的信噪比,同时实现更快的锁定时间。

    RF front end with reduced carrier leakage
    9.
    发明申请
    RF front end with reduced carrier leakage 有权
    射频前端具有减少的载波泄漏

    公开(公告)号:US20040023624A1

    公开(公告)日:2004-02-05

    申请号:US10207986

    申请日:2002-07-31

    CPC classification number: H04B1/28 H04B1/525

    Abstract: A method and apparatus that provide a frequency conversion in a radio frequency front-end are disclosed, including a frequency divider that divides an input signal frequency by a predetermined value to produce an output signal frequency; and a frequency mixer that mixes the output signal frequency with a carrier signal frequency to produce a converted signal frequency, which is substantially equal to a difference between the output signal frequency and the carrier signal frequency. The predetermined value and the input signal frequency are selected such that the carrier signal frequency is not substantially equivalent to an integer multiple of the output signal frequency. The method and apparatus can be used in a wireless communication receiver including wireless communication systems and wireless LAN systems.

    Abstract translation: 公开了一种在射频前端提供频率转换的方法和装置,包括将输入信号频率除以预定值以产生输出信号频率的分频器; 以及混频器,其将输出信号频率与载波信号频率进行混合,以产生基本上等于输出信号频率和载波信号频率之差的转换信号频率。 选择预定值和输入信号频率使得载波信号频率基本上不等于输出信号频率的整数倍。 该方法和装置可用于包括无线通信系统和无线LAN系统的无线通信接收机。

    Bidirectional turbo ISI canceller-based DSSS receiver for high-speed wireless LAN
    10.
    发明申请
    Bidirectional turbo ISI canceller-based DSSS receiver for high-speed wireless LAN 有权
    用于高速无线LAN的基于双向turbo ISI消除器的DSSS接收机

    公开(公告)号:US20040131109A1

    公开(公告)日:2004-07-08

    申请号:US10690629

    申请日:2003-10-23

    CPC classification number: H04B1/7097 H04B1/7115 H04L25/03171

    Abstract: A bidirectional turbo ISI canceller cancels precursor-ISI as well as postcursor-ISI in a received signal without incorporating a multiplicative feedforward equalization filter. This is accomplished by taking a three-step receiver design approach. In the first step, an optimal single-symbol RAKE receiver is designed to comprise a CMF, a codeword correlator bank, and an energy bias (EB) canceller under the assumption that no ISI is generated by preceding or trailing symbols. In a second step, a DFE is included for suppressing postcursor-ISI caused by a preceding symbol. Finally, a precursor ISI canceler is used to remove the remaining ISI caused by a trailing symbol. All three components may be integrated into a BTIC-based receiver applying turbo-iteration processing.

    Abstract translation: 双向turbo ISI消除器在接收信号中取消前体ISI以及后端ISI,而不需要并入前置均衡滤波器。 这是通过采取三步接收机设计方法来实现的。 在第一步中,假定不存在由先前或后面符号产生的ISI,最佳单符号RAKE接收机被设计为包括CMF,码字相关器组和能量偏置(EB)消除器。 在第二步骤中,包括用于抑制由先前符号引起的后期ISI的DFE。 最后,使用前驱体ISI消除器去除由尾随符号引起的剩余ISI。 所有三个组件可以被集成到应用turbo迭代处理的基于BTIC的接收机中。

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