公开(公告)号：US20140134822A1

公开(公告)日：2014-05-15

申请号：US13678011

申请日：2012-11-15

Applicant: GLOBALFOUNDRIES, INC.

Inventor： Gopal Srinivasan ,  Andy Wei ,  Dinesh Somasekhar ,  Ali Keshavarzi ,  Subi Kengeri

IPC: H01L49/02

CPC classification number: H01L28/20 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/785 ,  H01L29/78648

Abstract: A method for fabricating a FinFET integrated circuit includes depositing a first polysilicon layer at a first end of a diffusion region and a second polysilicon layer at a second end of the diffusion region; diffusing an n-type material into the diffusion region to form a diffused resistor; and epitaxially growing a silicon material between the first and second polysilicon layers to form fins structures over the diffused resistor and spanning between the first and second polysilicon layers.

Abstract translation: 一种制造FinFET集成电路的方法包括在扩散区的第二端处沉积第一多晶硅层，在扩散区的第二端沉积第二多晶硅层; 将n型材料扩散到扩散区域中以形成扩散电阻器; 并且在所述第一和第二多晶硅层之间外延生长硅材料，以在所述扩散电阻器上方形成翅片结构并跨越所述第一和第二多晶硅层。

公开(公告)号：US09437713B2

公开(公告)日：2016-09-06

申请号：US14181790

申请日：2014-02-17

Applicant: GLOBALFOUNDRIES INC.

Inventor： Jagar Singh ,  Andy Wei ,  Gopal Srinivasan ,  Amaury Gendron

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/308 ,  H01L29/94 ,  H01L27/06

CPC classification number: H01L29/66795 ,  H01L21/3086 ,  H01L27/0629 ,  H01L29/785 ,  H01L29/94

Abstract: Devices and methods for forming semiconductor devices with wider FinFETs for higher tunability of the varactor are provided. One method includes, for instance: obtaining an intermediate semiconductor device; applying a spacer layer over the semiconductor device; etching the semiconductor device to remove at least a portion of the spacer layer to expose the plurality of mandrels; removing the mandrels; etching the semiconductor device to remove a portion of the dielectric layer; forming at least one fin; and removing the spacer layer and the dielectric layer. One intermediate semiconductor device includes, for instance: a substrate; a dielectric layer over the substrate; a plurality of mandrels formed on the dielectric layer, the mandrels including a first set of mandrels and a second set of mandrels, wherein the first set of mandrels have a width twice as large as the second set of mandrels; and a spacer layer applied over the mandrels.

Abstract translation: 提供了用于形成具有更宽FinFET的半导体器件以用于变容二极管的较高可调性的装置和方法。 一种方法包括，例如：获得中间半导体器件; 在所述半导体器件上施加间隔层; 蚀刻半导体器件以去除间隔层的至少一部分以暴露多个心轴; 去除心轴; 蚀刻半导体器件以去除电介质层的一部分; 形成至少一个翅片; 以及去除间隔层和电介质层。 一个中间半导体器件包括例如：衬底; 介电层; 形成在所述电介质层上的多个心轴，所述心轴包括第一组心轴和第二组心轴，其中所述第一组心轴的宽度是所述第二组心轴的两倍; 以及施加在心轴上的间隔层。

公开(公告)号：US08962421B2

公开(公告)日：2015-02-24

申请号：US13678011

申请日：2012-11-15

Applicant: GLOBALFOUNDRIES, Inc.

Inventor： Gopal Srinivasan ,  Andy Wei ,  Dinesh Somasekhar ,  Ali Keshavarzi ,  Subi Kengeri

IPC: H01L21/8234 ,  H01L21/20 ,  H01L49/02 ,  H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L29/786 ,  H01L21/8238

CPC classification number: H01L28/20 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/785 ,  H01L29/78648

Abstract: A method for fabricating a FinFET integrated circuit includes depositing a first polysilicon layer at a first end of a diffusion region and a second polysilicon layer at a second end of the diffusion region; diffusing an n-type material into the diffusion region to form a diffused resistor; and epitaxially growing a silicon material between the first and second polysilicon layers to form fins structures over the diffused resistor and spanning between the first and second polysilicon layers.

Abstract translation: 一种制造FinFET集成电路的方法包括在扩散区的第二端处沉积第一多晶硅层，在扩散区的第二端沉积第二多晶硅层; 将n型材料扩散到扩散区域中以形成扩散电阻器; 并且在所述第一和第二多晶硅层之间外延生长硅材料，以在所述扩散电阻器上方形成翅片结构并跨越所述第一和第二多晶硅层。