公开(公告)号：US20160379930A1

公开(公告)日：2016-12-29

申请号：US14746891

申请日：2015-06-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： Vibhor Jain ,  Qizhi Liu ,  Ian A. McCallum-Cook

IPC: H01L23/525

CPC classification number: H01L23/5256 ,  H01L21/7682 ,  H01L23/522 ,  H01L23/5329

Abstract: Electrical fuses and methods for forming an electrical fuse. A semiconductor substrate is implanted to define a modified region in the semiconductor substrate. Trenches that surround the modified region and that penetrate into the semiconductor substrate to a depth greater than a depth of the modified region are formed in the modified region so as to define a fuse link of the electrical fuse. The substrate is removed from beneath the fuse link with a selective etching process that removes the semiconductor substrate with a first etch rate that is higher than a second etch rate of the modified region.

Abstract translation: 电熔丝和形成电熔丝的方法。 植入半导体衬底以限定半导体衬底中的改性区域。 围绕改性区域并且穿透到半导体衬底中的深度大于修饰区域的深度的沟槽形成在修改区域中，以便限定电熔丝的熔断体。 通过选择性蚀刻工艺从熔丝链下方去除衬底，其以比修改区域的第二蚀刻速率高的第一蚀刻速率去除半导体衬底。

公开(公告)号：US09831194B1

公开(公告)日：2017-11-28

申请号：US15203326

申请日：2016-07-06

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Tom C. Lee ,  Cathryn J. Christiansen ,  Ian A. McCallum-Cook ,  Anthony K. Stamper

IPC: H01L23/00 ,  H01L23/544 ,  H01L21/78

CPC classification number: H01L23/562 ,  H01L21/78 ,  H01L23/544 ,  H01L23/585 ,  H01L2223/54426 ,  H01L2223/5446

Abstract: Structures for a chip, as well as methods of fabricating such chip structures. The chip including a portion of a substrate, an active circuit region associated with the portion of the substrate, an interconnect structure on the active circuit region, and a crackstop extending through the interconnect structure. A groove extends through the interconnect structure to the substrate at a location exterior of the crackstop. A stress-containing layer is formed on at least a portion of the groove.

公开(公告)号：US09576899B2

公开(公告)日：2017-02-21

申请号：US14746891

申请日：2015-06-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： Vibhor Jain ,  Qizhi Liu ,  Ian A. McCallum-Cook

IPC: H01L23/00 ,  H01L23/525

CPC classification number: H01L23/5256 ,  H01L21/7682 ,  H01L23/522 ,  H01L23/5329

Abstract: Electrical fuses and methods for forming an electrical fuse. A semiconductor substrate is implanted to define a modified region in the semiconductor substrate. Trenches that surround the modified region and that penetrate into the semiconductor substrate to a depth greater than a depth of the modified region are formed in the modified region so as to define a fuse link of the electrical fuse. The substrate is removed from beneath the fuse link with a selective etching process that removes the semiconductor substrate with a first etch rate that is higher than a second etch rate of the modified region.

Abstract translation: 电熔丝和形成电熔丝的方法。 植入半导体衬底以限定半导体衬底中的改性区域。 围绕改性区域并且穿透到半导体衬底中的深度大于修饰区域的深度的沟槽形成在修改区域中，以便限定电熔丝的熔断体。 通过选择性蚀刻工艺从熔丝链下方去除衬底，其以比修改区域的第二蚀刻速率高的第一蚀刻速率去除半导体衬底。