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公开(公告)号:US09285417B2
公开(公告)日:2016-03-15
申请号:US13732482
申请日:2013-01-02
Applicant: GLOBALFOUNDRIES INC.
Inventor: Daniel J. Poindexter , James M. Crafts , Karre M. Greene , Kenneth A. Lavallee , Keith C. Stevens
CPC classification number: G01R31/2853 , G01R31/30 , H01L21/00 , H01L24/00 , H01M2200/00
Abstract: System and method using low voltage current measurements to measure voltage network currents in an integrated circuit (IC). In one aspect, a low voltage current leakage test is applied voltage networks for the IC or microchip via one or more IC chip connectors. One or multiple specifications are developed based on chip's circuit delay wherein a chip is aborted or sorted into a lesser reliability sort depending whether the chip fails specification. Alternately, a low voltage current leakage test begins an integrated circuit test flow. Then there is run a high voltage stress, and a second low voltage current leakage test is thereafter added. Then, there is compared the second low voltage test to the first low V test, and if the measured current is less on second test, this is indicative of a defect present which may result in either a scrap or downgrade reliability of chip.
Abstract translation: 使用低电压电流测量的系统和方法来测量集成电路(IC)中的电压网络电流。 一方面,通过一个或多个IC芯片连接器对IC或微芯片施加低电压电流泄漏测试。 基于芯片的电路延迟开发一个或多个规范,其中芯片被中止或者根据芯片的规格是否失败,将其分类为较小的可靠性排序。 或者,低压电流泄漏测试开始集成电路测试流程。 然后施加高电压应力,然后再加入第二次低压漏电试验。 然后,将第二个低电压测试与第一个低V测试进行比较,如果在第二次测试中测量的电流较小,则表明存在可能导致芯片的碎片或降级可靠性的缺陷。