EXTRACTION OF RESISTANCE ASSOCIATED WITH LATERALLY DIFFUSED DOPANT PROFILES IN CMOS DEVICES
    1.
    发明申请
    EXTRACTION OF RESISTANCE ASSOCIATED WITH LATERALLY DIFFUSED DOPANT PROFILES IN CMOS DEVICES 有权
    在CMOS器件中提取与侧向扩散钆型材相关的电阻

    公开(公告)号:US20160225680A1

    公开(公告)日:2016-08-04

    申请号:US14613570

    申请日:2015-02-04

    Abstract: Various embodiments provide systems, computer program products and computer implemented methods. In some embodiments, a system includes a computer-implemented method of determining a laterally diffuse dopant profile in semiconductor structures by providing first and second semiconductor structures having plurality of gate array structures in a silicided region separated from each other by a first distance and second distance. A potential difference is applied across the plurality of gate array structures and resistances are determined. A linear-regression fit is performed on measured resistance versus the first distance and the second distance with an extrapolated x equals 0 and a y-intercept to determine a laterally diffused dopant-profile under the plurality of gate array structures based on a semiconductor device model.

    Abstract translation: 各种实施例提供系统,计算机程序产品和计算机实现的方法。 在一些实施例中,系统包括计算机实现的方法,该方法通过提供具有多个栅极阵列结构的第一和第二半导体结构来确定半导体结构中的横向扩散掺杂物分布,所述第一和第二半导体结构在硅化区域中彼此分开第一距离和第二距离 。 在多个栅极阵列结构之间施加电势差,并确定电阻。 基于半导体器件模型,在测量的电阻相对于第一距离和第二距离上执行线性回归拟合,其中外推的x等于0和y截距以确定多个门阵列结构下的横向扩散的掺杂​​剂轮廓 。

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