Methodology of grading reliability and performance of chips across wafer
    1.
    发明授权
    Methodology of grading reliability and performance of chips across wafer 有权
    晶片上芯片的可靠性和性能分级方法

    公开(公告)号:US09575115B2

    公开(公告)日:2017-02-21

    申请号:US13649699

    申请日:2012-10-11

    Abstract: A system and method sorts integrated circuit devices. Integrated circuit devices are manufactured on a wafer according to an integrated circuit design using manufacturing equipment. The design produces integrated circuit devices that are identically designed and perform differently based on manufacturing process variations. The integrated circuit devices are for use in a range of environmental conditions, when placed in service. Testing is performed on the integrated circuit devices. Environmental maximums are individually predicted for each device. The environmental maximums comprise ones of the environmental conditions that must not be exceeded for each device to perform above a given failure rate. Each integrated circuit device is assigned at least one of a plurality of grades based on the environmental maximums predicted for each device. The integrated circuit devices are provided to different forms of service having different ones of the environmental conditions based on the grades assigned to each device.

    Abstract translation: 一种系统和方法对集成电路器件进行排序。 根据使用制造设备的集成电路设计,在晶片上制造集成电路器件。 该设计生产的集成电路器件根据制造工艺变化相同设计和执行不同。 集成电路设备在使用时可用于一系列环境条件。 在集成电路器件上进行测试。 每个设备单独预测环境最大值。 环境最大值包括每个设备在给定故障率以上执行时不得超过的环境条件。 基于为每个设备预测的环境最大值,为每个集成电路设备分配多个等级中的至少一个。 基于分配给每个设备的等级,将集成电路设备提供给具有不同环境条件的不同服务形式。

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