公开(公告)号：US20190252268A1

公开(公告)日：2019-08-15

申请号：US15897204

申请日：2018-02-15

Applicant: GLOBALFOUNDRIES INC.

Inventor： Ruilong Xie ,  Chanro Park ,  Laertis Economikos ,  Andrew M. Greene ,  Siva Kanakasabapathy ,  John R. Sporre

IPC: H01L21/8238 ,  H01L21/28 ,  H01L29/66 ,  H01L27/092 ,  H01L29/06 ,  H01L29/49

CPC classification number: H01L21/823864 ,  H01L21/28088 ,  H01L21/28185 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/823878 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/4966 ,  H01L29/6653 ,  H01L29/66545

Abstract: Gate isolation methods and structures leverage the formation of a sidewall spacer layer within a recess formed in an organic planarization layer. The spacer layer enables precise alignment of the cut region of a sacrificial gate, which may be backfilled with an isolation layer. By forming the isolation layer after a reliability anneal of the gate dielectric and after formation of a first work function metal layer, both the desired critical dimension (CD) and alignment of the isolation layer can be achieved.