TRANSISTORS PATTERNED WITH ELECTROSTATIC DISCHARGE PROTECTION AND METHODS OF FABRICATION
    1.
    发明申请
    TRANSISTORS PATTERNED WITH ELECTROSTATIC DISCHARGE PROTECTION AND METHODS OF FABRICATION 审中-公开
    带有静电放电保护的晶体管和制造方法

    公开(公告)号:US20160276336A1

    公开(公告)日:2016-09-22

    申请号:US14661202

    申请日:2015-03-18

    Abstract: High-voltage semiconductor devices with electrostatic discharge (ESD) protection and methods of fabrication are provided. The semiconductor devices include a plurality of transistors on a substrate patterned with one or more common gates extending across a portion of the substrate, and a plurality of first S/D contacts and a plurality of second S/D contacts associated with the common gate(s). The second S/D contacts are disposed over a plurality of carrier-doped regions within the substrate. One or more floating nodes are disposed above the substrate and, at least in part, between second S/D contacts to facilitate defining the plurality of carrier-doped regions within the substrate. For instance, the carrier-doped regions may be defined from a mask with a common carrier-region opening, with the floating node(s) intersecting the common carrier-region opening and facilitating defining, along with the common opening, the plurality of separate carrier-doped regions.

    Abstract translation: 提供了具有静电放电(ESD)保护和制造方法的高压半导体器件。 半导体器件包括在衬底上图案化的多个晶体管,该一个或多个公共栅极延伸穿过衬底的一部分,以及多个第一S / D触点和与公共栅极相关联的多个第二S / D触点 s)。 第二S / D触点设置在衬底内的多个载流子掺杂区域上。 一个或多个浮动节点设置在衬底上方,并且至少部分地设置在第二S / D触点之间,以有助于限定衬底内的多个载流子掺杂区域。 例如,载流子掺杂区域可以由具有公共载流子区域开口的掩模限定,浮动节点与公共载流子区域开口相交,并且有助于与公共开口一起限定多个分开的 载流子掺杂区域。

    PLANAR SEMICONDUCTOR ESD DEVICE AND METHOD OF MAKING SAME
    3.
    发明申请
    PLANAR SEMICONDUCTOR ESD DEVICE AND METHOD OF MAKING SAME 有权
    平面半导体ESD器件及其制造方法

    公开(公告)号:US20160035906A1

    公开(公告)日:2016-02-04

    申请号:US14450887

    申请日:2014-08-04

    CPC classification number: H01L29/8611 H01L27/0255 H01L29/0684 H01L29/66128

    Abstract: An ESD device is provided for protecting a circuit from electrostatic discharge, and includes a planar diode having an anode and a cathode. The anode is electrically coupled to a signal path of the circuit, and the cathode is electrically coupled to a ground of the circuit. The ESD device is configured to be off during normal operation of the circuit and to turn on in response to an electrostatic discharge on the signal path. Two depletion regions in the device are separated by an isolation well. In response to the electrostatic discharge, the depletion regions modulate (e.g., widen and merge), providing a path for the discharge to the ground of the circuit.

    Abstract translation: 提供ESD器件用于保护电路免受静电放电,并且包括具有阳极和阴极的平面二极管。 阳极电耦合到电路的信号路径,并且阴极电耦合到电路的地。 ESD装置被配置为在电路的正常操作期间关闭并且响应于信号路径上的静电放电而导通。 器件中的两个耗尽区由隔离阱隔开。 响应于静电放电,耗尽区域调制(例如,加宽和合并),提供用于放电到电路接地的路径。

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