SPECIAL CONSTRUCT FOR CONTINUOUS NON-UNIFORM RX FINFET STANDARD CELLS
    1.
    发明申请
    SPECIAL CONSTRUCT FOR CONTINUOUS NON-UNIFORM RX FINFET STANDARD CELLS 有权
    连续非均匀RX FINFET标准电池的特殊构造

    公开(公告)号:US20160225763A1

    公开(公告)日:2016-08-04

    申请号:US15063563

    申请日:2016-03-08

    Abstract: Methods for abutting two cells with different sized diffusion regions and the resulting devices are provided. Embodiments include abutting a first cell having first drain and source diffusion regions and a second cell having second drain and source diffusion regions, larger than the first diffusion regions, by: forming a dummy gate at a boundary between the two cells; forming a continuous drain diffusion region having an upper portion crossing the dummy gate and encompassing the entire first drain diffusion region and part of the second drain diffusion region and having a lower portion beginning over the dummy gate and encompassing a remainder of the second drain diffusion region; forming a continuous source diffusion region that is the mirror image of the continuous drain diffusion region; and forming a poly-cut mask over the dummy gate between, but separated from, the continuous drain and source diffusion regions.

    Abstract translation: 提供了用于使具有不同大小的扩散区域的两个电池邻接的方法以及所得到的装置。 实施例包括:通过在两个单元之间的边界处形成虚拟栅极来邻接具有第一漏极和源极扩散区域的第一单元和具有大于第一扩散区域的第二漏极和源极扩散区域的第二单元; 形成连续的漏极扩散区域,其具有与伪栅极交叉的上部,并且包围整个第一漏极扩散区域和第二漏极扩散区域的一部分,并且具有从伪栅极开始的下部,并且包围第二漏极扩散区域的剩余部分 ; 形成作为连续漏极扩散区域的镜像的连续源极扩散区域; 以及在连续的漏极和源极扩散区之间在虚拟栅极之间形成多边形掩模,但是与连续的漏极和源极扩散区分离。

    MEASURING SETUP AND HOLD TIMES USING A VIRTUAL DELAY
    4.
    发明申请
    MEASURING SETUP AND HOLD TIMES USING A VIRTUAL DELAY 有权
    使用虚拟延迟测量设置和保持时间

    公开(公告)号:US20150309113A1

    公开(公告)日:2015-10-29

    申请号:US14263329

    申请日:2014-04-28

    CPC classification number: H03K23/50 G01R31/31727 H03K5/22

    Abstract: Methodologies and an apparatus for measuring setup and hold times of fabricated semiconductor devices are provided. Embodiments include: providing a first digital frequency divider having an input and an output, the input of the first digital frequency divider receiving a first signal indicating an oscillating signal with a first delay; providing a second digital frequency divider having an input and output, the input of the second digital frequency divider receiving a second signal indicating the oscillating signal with a second delay; and providing a flip-flop having an input and an output, wherein the input of the flip-flop is coupled to the output of the second digital frequency divider and a data signal and clock signal for measuring a set-up time or hold time of a device under test are generated.

    Abstract translation: 提供了用于测量制造的半导体器件的建立和保持时间的方法和装置。 实施例包括:提供具有输入和输出的第一数字分频器,第一数字分频器的输入接收指示具有第一延迟的振荡信号的第一信号; 提供具有输入和输出的第二数字分频器,所述第二数字分频器的输入端以第二延迟接收指示所述振荡信号的第二信号; 以及提供具有输入和输出的触发器,其中所述触发器的输入耦合到所述第二数字分频器的输出,以及数据信号和时钟信号,用于测量所述触发器的建立时间或保持时间 生成被测设备。

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