公开(公告)号：US08828819B2

公开(公告)日：2014-09-09

申请号：US13718346

申请日：2012-12-18

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Stephen Kronholz ,  Markus Lenski ,  Vassilios Papageorgiou

IPC: H01L27/092 ,  H01L21/336 ,  H01L29/49 ,  H01L29/423 ,  H01L21/28 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/78

CPC classification number: H01L29/7848 ,  H01L21/28088 ,  H01L21/28114 ,  H01L21/28247 ,  H01L21/823418 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/82385 ,  H01L21/823864 ,  H01L27/092 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/51

Abstract: Performance of P-channel transistors may be enhanced on the basis of an embedded strain-inducing semiconductor alloy by forming a gate electrode structure on the basis of a high-k dielectric material in combination with a metal-containing cap layer in order to obtain an undercut configuration of the gate electrode structure. Consequently, the strain-inducing semiconductor alloy may be formed on the basis of a sidewall spacer of minimum thickness in order to position the strain-inducing semiconductor material closer to a central area of the channel region.

Abstract translation: 基于嵌入式应变诱发半导体合金，可以通过基于高k介电材料与含金属盖层组合形成栅电极结构来增强P沟道晶体管的性能，以获得 栅电极结构的底切配置。 因此，应变诱导半导体合金可以基于最小厚度的侧壁间隔物形成，以便使应变诱导半导体材料更靠近沟道区的中心区域。