公开(公告)号：US09646838B2

公开(公告)日：2017-05-09

申请号：US14293627

申请日：2014-06-02

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Dominic Thurmer ,  Sven Metzger ,  Joachim Patzer ,  Markus Lenski

IPC: H01L21/8234 ,  H01L21/283 ,  H01L27/06 ,  H01L21/268 ,  H01L29/66 ,  H01L29/78 ,  H01L27/11 ,  H01L21/285

CPC classification number: H01L21/283 ,  H01L21/268 ,  H01L21/28518 ,  H01L21/823412 ,  H01L21/823418 ,  H01L27/0629 ,  H01L27/1104 ,  H01L29/665 ,  H01L29/7843 ,  H01L29/7847

Abstract: A method includes providing a semiconductor structure including at least one first circuit element including a first semiconductor material and at least one second circuit element including a second semiconductor material. A dielectric layer having an intrinsic stress is formed that includes a first portion over the at least one first circuit element and a second portion over the at least one second circuit element. A first annealing process is performed, wherein an intrinsic stress is created at least in the first semiconductor material by stress memorization, and thereafter the first portion of the dielectric layer is removed. A layer of a metal is formed, and a second annealing process is performed, wherein the metal and the first semiconductor material react chemically to form a silicide. The second portion of the dielectric layer substantially prevents a chemical reaction between the second semiconductor material and the metal.

公开(公告)号：US20150031179A1

公开(公告)日：2015-01-29

申请号：US14293627

申请日：2014-06-02

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Dominic Thurmer ,  Sven Metzger ,  Joachim Patzer ,  Markus Lenski

IPC: H01L21/283 ,  H01L29/66

CPC classification number: H01L21/283 ,  H01L21/268 ,  H01L21/28518 ,  H01L21/823412 ,  H01L21/823418 ,  H01L27/0629 ,  H01L27/1104 ,  H01L29/665 ,  H01L29/7843 ,  H01L29/7847

Abstract: A method includes providing a semiconductor structure including at least one first circuit element including a first semiconductor material and at least one second circuit element including a second semiconductor material. A dielectric layer having an intrinsic stress is formed that includes a first portion over the at least one first circuit element and a second portion over the at least one second circuit element. A first annealing process is performed, wherein an intrinsic stress is created at least in the first semiconductor material by stress memorization, and thereafter the first portion of the dielectric layer is removed. A layer of a metal is formed, and a second annealing process is performed, wherein the metal and the first semiconductor material react chemically to form a silicide. The second portion of the dielectric layer substantially prevents a chemical reaction between the second semiconductor material and the metal.

Abstract translation: 一种方法包括提供包括至少一个包括第一半导体材料的第一电路元件和包括第二半导体材料的至少一个第二电路元件的半导体结构。 形成具有固有应力的电介质层，其包括至少一个第一电路元件上的第一部分和至少一个第二电路元件上的第二部分。 进行第一退火处理，其中通过应力记忆至少在第一半导体材料中产生固有应力，然后去除电介质层的第一部分。 形成金属层，进行第二退火处理，其中金属和第一半导体材料通过化学反应形成硅化物。 电介质层的第二部分基本上防止了第二半导体材料与金属之间的化学反应。