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公开(公告)号:US20150069579A1
公开(公告)日:2015-03-12
申请号:US14542130
申请日:2014-11-14
Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
IPC: H01L23/48
CPC classification number: H01L23/481 , H01L21/7682 , H01L21/76898 , H01L2924/0002 , H01L2924/00
Abstract: Semiconductor devices with air gaps around the through-silicon via are formed. Embodiments include forming a first cavity in a substrate, filling the first cavity with a sacrificial material, forming a second cavity in the substrate, through the sacrificial material, by removing a portion of the sacrificial material and a portion of the substrate below the sacrificial material, filling the second cavity with a conductive material, removing a remaining portion of the sacrificial material to form an air gap between the conductive material and the substrate, and forming a cap over the air gap.
Abstract translation: 形成具有穿过硅通孔的气隙的半导体器件。 实施例包括在衬底中形成第一腔,用牺牲材料填充第一腔,通过牺牲材料在衬底中形成第二腔,通过去除牺牲材料的一部分和牺牲材料下方的一部分衬底 用导电材料填充第二腔,去除牺牲材料的剩余部分以在导电材料和衬底之间形成气隙,并在气隙上形成帽。
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公开(公告)号:US20150061085A1
公开(公告)日:2015-03-05
申请号:US14535337
申请日:2014-11-07
Applicant: GLOBALFOUNDRIES Singapore Pte Ltd.
IPC: H01L23/522
CPC classification number: H01L23/5226 , B81B3/0072 , B81B2207/015 , B81B2207/07 , H01L21/76831 , H01L21/76898 , H01L23/481 , H01L2924/0002 , H01L2924/00
Abstract: A method for forming a device is disclosed. A substrate having first and second major surfaces is provided. A stress buffer is formed in the substrate. A through silicon via (TSV) contact is formed between the stress buffer. The stress buffer has a depth less than a depth of the TSV contact. The stress buffer alleviates stress created by the difference in coefficient thermal expansion (CTE) between the TSV contact and the substrate.
Abstract translation: 公开了一种用于形成装置的方法。 提供具有第一和第二主表面的基板。 在衬底中形成应力缓冲器。 在应力缓冲器之间形成贯通硅通孔(TSV)接触。 应力缓冲器的深度小于TSV接触深度。 应力缓冲器减轻由TSV接触和基板之间的系数热膨胀差(CTE)产生的应力。
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公开(公告)号:US20160190066A1
公开(公告)日:2016-06-30
申请号:US15063526
申请日:2016-03-08
Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
Inventor: Benfu LIN , Hong YU , Lup San LEONG , Alex SEE , Wei LU
IPC: H01L23/535 , H01L23/532 , H01L23/528
CPC classification number: H01L23/535 , H01L21/76898 , H01L23/481 , H01L23/528 , H01L23/53295 , H01L2924/0002 , H01L2924/00
Abstract: A device and methods for forming a device are disclosed. A substrate is provided and a TSV is formed in the substrate through a top surface of the substrate. The TSV and top surface of the substrate is lined with an insulation stack having a first insulation layer, a polish stop layer and a second insulation layer. A conductive layer is formed on the substrate. The TSV is filled with conductive material of the conductive layer. The substrate is planarized to remove excess conductive material of the conductive layer. The planarizing stops on the polish stop layer to form a planar top surface.
Abstract translation: 公开了一种用于形成装置的装置和方法。 提供衬底,并且通过衬底的顶表面在衬底中形成TSV。 衬底的TSV和顶表面衬有具有第一绝缘层,抛光停止层和第二绝缘层的绝缘堆叠。 在基板上形成导电层。 TSV填充有导电层的导电材料。 将衬底平坦化以除去导电层的过量导电材料。 平坦化停止在抛光停止层上以形成平坦的顶表面。
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