STT-MRAM Bitcell for Embedded Flash Applications
    1.
    发明申请
    STT-MRAM Bitcell for Embedded Flash Applications 有权
    用于嵌入式闪存应用的STT-MRAM Bitcell

    公开(公告)号:US20160300604A1

    公开(公告)日:2016-10-13

    申请号:US15095170

    申请日:2016-04-11

    Abstract: A spin transfer torque magnetic random access memory (STT-MRAM) device and a method to perform operations of an embedded eFlash device are disclosed. The STT-MRAM device is configured to include an array of STT-MRAM bitcells. The array includes a plurality of bitlines (BLs) and a plurality of word lines (WLs), where the bitlines form columns and the wordlines form rows of STT-MRAM bitcells. Each STT-MRAM bitcell includes a magnetic tunnel junction (MTJ) element coupled in series to an access transistor having a gate terminal and source and drain terminals. The array includes a plurality of source lines (SLs) coupled to the source terminals of the access transistors. A SL of the plurality of SLs is coupled to source terminals of access transistors of two or more adjacent columns of the STT-MRAM cells. The shared SL is parallel to the plurality of BLs. The operations of such a STT-MRAM bitcell are configured to include: an initialization operation, a program operation, and a sector erase operation.

    Abstract translation: 公开了一种自旋转移磁力随机存取存储器(STT-MRAM)装置和一种执行嵌入式eFlash装置的操作的方法。 STT-MRAM设备被配置为包括STT-MRAM位单元的阵列。 阵列包括多个位线(BL)和多个字线(WL),其中位线形成列,并且字线形成STT-MRAM位单元的行。 每个STT-MRAM位单元包括与具有栅极端子和源极和漏极端子的存取晶体管串联耦合的磁性隧道结(MTJ)元件。 阵列包括耦合到存取晶体管的源极端子的多个源极线(SL)。 多个SL中的SL耦合到STT-MRAM单元的两个或更多个相邻列的存取晶体管的源极端子。 共享SL与多个BL平行。 这种STT-MRAM位单元的操作被配置为包括:初始化操作,程序操作和扇区擦除操作。

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