公开(公告)号：US20240234425A1

公开(公告)日：2024-07-11

申请号：US18095746

申请日：2023-01-11

Applicant: GlobalFoundries U.S. Inc.

Inventor： Tamilmani ETHIRAJAN ,  Kaustubh SHANBHAG ,  George R. MULFINGER ,  Anton V. TOKRANOV ,  Eric S. KOZARSKY ,  Hui ZHAN

IPC: H01L27/12 ,  H01L21/84 ,  H01L23/535 ,  H01L29/78

CPC classification number: H01L27/1203 ,  H01L21/84 ,  H01L23/535 ,  H01L29/7838

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to devices with isolation structures in active regions and methods of manufacture. The structure includes: an active region; a plurality of isolation structures within the active region; a plurality of gate structures overlapping the plurality of isolation structures within the active region; and diffusion regions on sides of the plurality of gate structures and the plurality of isolation structures.

公开(公告)号：US20210335772A1

公开(公告)日：2021-10-28

申请号：US16857298

申请日：2020-04-24

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Wenjun LI ,  Chen PERKINS YAN ,  Tamilmani ETHIRAJAN ,  Cole E. ZEMKE

IPC: H01L27/02 ,  H01L27/088 ,  H01L29/08 ,  H01L29/423 ,  H01L21/8234 ,  H03F3/195

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to unitary Cascode cells with resistance and capacitance optimization, and methods of manufacture. The structure includes a common source FET (CS-FET) in a first portion of a single common semiconductor region, the CS-FET comprising a source region and a drain region, a common gate FET (CG-FET) in a second portion of the single common semiconductor region, the CG-FET comprising a source region and a drain region, and a doped connecting region of the single common semiconductor region, connecting the drain of the CS-FET and the source of the CG-FET.