公开(公告)号：US20210091202A1

公开(公告)日：2021-03-25

申请号：US16579050

申请日：2019-09-23

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Xiaoli He ,  Bingwu Liu ,  Tao Chu

IPC: H01L29/51 ,  H01L21/28 ,  H01L21/8238 ,  H01L27/092

Abstract: Structures for field-effect transistors and methods of forming a structure for field-effect transistors. A semiconductor layer includes first and second channel regions, a first field-effect transistor has a first gate dielectric layer over the first channel region, and a second field-effect transistor has a second gate dielectric layer over the second channel region. The first and second channel regions are each composed of an undoped section of an intrinsic semiconductor material, the first gate dielectric layer contains a first atomic concentration of a work function metal, and the second gate dielectric layer contains a second atomic concentration of the work function metal that is greater than the first atomic concentration of the work function metal in the first gate dielectric layer.

公开(公告)号：US11315835B2

公开(公告)日：2022-04-26

申请号：US16296469

申请日：2019-03-08

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Wei Hong ,  Hong Yu ,  Tao Chu ,  Bingwu Liu

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/8234 ,  H01L29/06 ,  H01L21/308

Abstract: One illustrative method disclosed herein includes forming a conformal SMCM layer above a conformal high-k gate insulation layer within each of first and second replacement gate cavities (RGC), removing the SMCM layer from the first RGC while leaving the SMCM layer in position within the second RGC, forming a first conformal metal-containing material (MCM) layer above the gate insulation layer within the first RGC and above the SMCM layer in position within the second RGC, removing the first conformal MCM layer and the conformal SMCM layer positioned within the second RGC while leaving the first conformal MCM layer within the first RGC, and forming a second conformal MCM layer above the first conformal MCM layer positioned within the first RGC and above the gate insulation layer positioned within the second RGC.

公开(公告)号：US11158635B2

公开(公告)日：2021-10-26

申请号：US16832139

申请日：2020-03-27

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Dali Shao ,  Tao Chu ,  Liqiao Qin

IPC: H01L21/28 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/49

Abstract: One illustrative IC product disclosed herein includes a semiconductor substrate and a first transistor device formed on the semiconductor substrate. The first transistor device comprises a first gate structure. The first gate structure comprises a gate insulation layer, a first layer of titanium nitride (TiN) positioned above the gate insulation layer, a layer of titanium silicon nitride (TiSiN) positioned above the first layer of TiN and a second layer of titanium nitride (TiN) positioned above the layer of TiSiN.

公开(公告)号：US20210305251A1

公开(公告)日：2021-09-30

申请号：US16832139

申请日：2020-03-27

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Dali Shao ,  Tao Chu ,  Liqiao Qin

IPC: H01L27/092 ,  H01L29/49 ,  H01L21/8238 ,  H01L21/28

Abstract: One illustrative IC product disclosed herein includes a semiconductor substrate and a first transistor device formed on the semiconductor substrate. The first transistor device comprises a first gate structure. The first gate structure comprises a gate insulation layer, a first layer of titanium nitride (TiN) positioned above the gate insulation layer, a layer of titanium silicon nitride (TiSiN) positioned above the first layer of TiN and a second layer of titanium nitride (TiN) positioned above the layer of TiSiN.

公开(公告)号：US11264477B2

公开(公告)日：2022-03-01

申请号：US16579050

申请日：2019-09-23

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Xiaoli He ,  Bingwu Liu ,  Tao Chu

IPC: H01L29/51 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/28

Abstract: Structures for field-effect transistors and methods of forming a structure for field-effect transistors. A semiconductor layer includes first and second channel regions, a first field-effect transistor has a first gate dielectric layer over the first channel region, and a second field-effect transistor has a second gate dielectric layer over the second channel region. The first and second channel regions are each composed of an undoped section of an intrinsic semiconductor material, the first gate dielectric layer contains a first atomic concentration of a work function metal, and the second gate dielectric layer contains a second atomic concentration of the work function metal that is greater than the first atomic concentration of the work function metal in the first gate dielectric layer.

公开(公告)号：US10964598B2

公开(公告)日：2021-03-30

申请号：US16515638

申请日：2019-07-18

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Bingwu Liu ,  Tao Chu ,  Man Gu

IPC: H01L21/8234 ,  H01L29/10 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66

Abstract: One illustrative method disclosed herein includes forming at least one fin, forming a first recessed layer of insulating material adjacent the at least one fin and forming epi semiconductor material on the at least one fin. In this example, the method also includes forming a second recessed layer of insulating material above the first recessed layer of insulating material, wherein at least a portion of the epi semiconductor material is positioned above a level of the upper surface of the second recessed layer of insulating material, and forming a source/drain contact structure above the second recessed layer of insulating material, wherein the source/drain contact structure is conductively coupled to the epi semiconductor material.