Abstract:
A tagging system contains first taggants and second taggants. The taggants differ from each other so that the first taggants have a first emission spectrum and a first absorption edge and the second taggants have a second emission spectrum and a second absorption edge. In the tagging system, the first taggants are arranged to be within an interaction distance of the second taggants so that energy transfer between the first taggants and the second taggants causes an emission spectrum of the tagging system to differ from a sum of the first emission spectrum and the second emission spectrum.
Abstract:
A color-tunable, reflective, paper-like display utilizes the unique optical properties of nano-engineered metal and metal-dielectric composite structures that exhibit a plasmon resonance. By changing the dielectric properties of a medium in which these structures are embedded, or by changing the spatial relationship of these structures, their optical absorbance and scattering spectra can be tuned. This enables simpler pixel architectures with better performance than is possible with fixed-color technologies. Low power video rate operation can be achieved in a paper-like display.
Abstract:
A system and method to control the allocation of processor (or state machine) execution resources to individual tasks executing in computer systems is described. By controlling the allocation of execution resources, to all tasks, each task may be provided with throughput and response time guarantees. This control is accomplished through workload metering shaping which delays the execution of tasks that have used their workload allocation until sufficient time has passed to accumulate credit for execution (accumulate credit over time to perform their allocated work) and workload prioritization which gives preference to tasks based on configured priorities.
Abstract:
An ultra-high-density data storage device that relies on optical signals. The device includes a luminescent layer that emits light when stimulated by an electron beam. The device also includes a phase-change layer that contains data bits that may absorb or reflect the stimulated light before the light reaches a detector. Also, a method of data storage and retrieval that includes writing data bits in the phase-change layer, stimulating emissions in the luminescent layer, and reading data bits by monitoring the amount of light that reaches the detector.
Abstract:
A processor architecture is described which operates with improved computational efficiency using instruction fetching functions that are decoupled from instruction execution functions by a dynamic register file. The instruction fetching function operates in free-running mode which does not stop if a fetched instruction cannot be executed due to data being unavailable or due to other instruction dependencies. Branch instructions are taken in a predicted direction and the results of execution of all instructions are provisionally stored pending validation or invalidation on the basis of the dependencies becoming available later. For branches of executed instructions that are later invalidated, the results of the executed instructions are flushed from provisional storage and the initial instruction which previously executed at the beginning of a branch on predicted dependencies is re-executed on the actual data that subsequently became available, and all subsequent instructions in such branch are also re-executed on the basis of dependencies actually available from execution of previous instructions in such branch.
Abstract:
Luminescent materials include a plurality of nanocrystals. At least some of the nanocrystals may be configured to emit electromagnetic radiation upon stimulation, and the plurality of nanocrystals may exhibit a multi-modal energy level distribution. The distribution of the nanocrystals may be selectively configured to enhance the luminescence efficiency of a fraction of the plurality of nanocrystals that exhibits one energy level mode of the multi-modal energy level distribution. Light-emitting diodes and electronic devices include such luminescent materials.
Abstract:
A method of forming a diode structure for a phase-change data storage array, having multiple thin film layers adapted to form a plurality of data storage cell diodes is disclosed. The method includes depositing a first diode layer of CuInSe material on a substrate and depositing a second diode layer of phase-change material on the first diode layer.
Abstract:
An ultra-high-density data storage device including at least one energy-channeling component and a storage medium that usually includes at least one rectifying junction region. The energy-channeling component is generally capable of emitting such energies as, but not limited to, thermal, optical and electronic energy. The energy-channeling component is generally located either within close proximity of or in direct contact with the storage medium. The storage medium typically includes nanometer-scaled storage areas.
Abstract:
A processor architecture is described which operates with improved computational efficiency using instruction fetching functions that are decoupled from instruction execution functions by a dynamic register file. The instruction fetching function operates in free-running mode which does not stop if a fetched instruction cannot be executed due to data being unavailable or due to other instruction dependencies. Branch instructions are taken in a predicted direction and the results of execution of all instructions are provisionally stored pending validation or invalidation on the basis of the dependencies becoming available later. For branches of executed instructions that are later invalidated, the results of the executed instructions are flushed from provisional storage and the initial instruction which previously executed at the beginning of a branch on predicted dependencies is re-executed on the actual data that subsequently became available, and all subsequent instructions in such branch are also re-executed on the basis of dependencies actually available from execution of previous instructions in such branch.
Abstract:
A processor architecture is described which operates with improved computational efficiency using instruction fetching functions that are decoupled from instruction execution functions by a dynamic register file. The instruction fetching function operates in free-running mode which does not stop if a fetched instruction cannot be executed due to data being unavailable or due to other instruction dependencies. Branch instructions are taken in a predicted direction and the results of execution of all instructions are provisionally stored pending validation or invalidation on the basis of the dependencies becoming available later. For branches of executed instructions that are later invalidated, the results of the executed instructions are flushed from provisional storage and the initial instruction which previously executed at the beginning of a branch on predicted dependencies is re-executed on the actual data that subsequently became available, and all subsequent instructions in such branch are also re-executed on the basis of dependencies actually available from execution of previous instructions in such branch.