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公开(公告)号：US08898246B2
公开(公告)日：2014-11-25
申请号：US10902341
申请日：2004-07-29
申请人： Gary Belgrave Gostin , Larry N. McMahan , Michael A. Schroeder , Craig W. Warner , Richard W. Adkisson , Huai-Ter Victor Chong , David M. Binford , Mark Edward Shaw , Joe P. Cowan , Thierry Fevrier , Arad Rostampour
发明人： Gary Belgrave Gostin , Larry N. McMahan , Michael A. Schroeder , Craig W. Warner , Richard W. Adkisson , Huai-Ter Victor Chong , David M. Binford , Mark Edward Shaw , Joe P. Cowan , Thierry Fevrier , Arad Rostampour
IPC分类号： G06F15/16 , G06F9/50 , G06F9/54 , G06F15/167
CPC分类号： G06F9/5077 , G06F9/544 , G06F15/167
摘要： A computing device having partitions, and a method of communicating between partitions, are disclosed wherein at least one partition comprises: at least one register substantially always accessible to other partitions and capable of defining an address area; at least one address area that may be accessible to other partitions and is capable of being defined by the at least one register; and address areas other than the at least one accessible address area that are not accessible to other partitions. A method of processing interrupts comprising receiving an interrupt, assessing the origin of the interrupt, accepting, rejecting, or further assessing the interrupt, depending on its origin, when further assessing the interrupt, accepting or rejecting the interrupt depending on its contents, and forwarding accepted interrupts but not rejected interrupts to a target processor, and a device carrying out that method are also disclosed.
摘要翻译： 公开了一种具有分区的计算设备和分区之间的通信方法，其中至少一个分区包括：至少一个寄存器，其基本上总是可被其他分区访问并且能够定义地址区域; 至少一个地址区域，其可以由其他分区访问并且能够由所述至少一个寄存器定义; 以及除了其他分区不可访问的至少一个可访问地址区域以外的地址区域。 一种处理中断的方法，包括接收中断，根据其来源评估中断的起始点，接受，拒绝或进一步评估中断，当进一步评估中断时，根据其中的内容接受或拒绝中断，以及转发 接受的中断但不拒绝对目标处理器的中断，并且还公开了执行该方法的设备。
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公开(公告)号：US07099977B2
公开(公告)日：2006-08-29
申请号：US10756434
申请日：2004-01-12
IPC分类号： G06F13/00
CPC分类号： G06F9/4812
摘要： A method for processing an interrupt message in a system having a plurality of processors arranged into at least two partitions. The interrupt message is decoded to identify an interrupt source. If the interrupt source is not in an interrupt set, the interrupt is dropped. If the interrupt source is in a local partition, the interrupt is delivered. If the interrupt source is in the interrupt set and not in the local partition, the interrupt is processed in accordance with at least one of a target enable register and a vector enable register.
摘要翻译： 一种在具有布置在至少两个分区中的多个处理器的系统中处理中断消息的方法。 中断消息被解码以识别中断源。 如果中断源不在中断集中，则中断被中断。 如果中断源在本地分区中，则中断被传递。 如果中断源处于中断集合而不在本地分区中，则根据目标使能寄存器和向量使能寄存器中的至少一个来处理中断。
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3.发明授权Data delivery based on a select data delivery performance parameter in a data processing system 失效基于数据处理系统中的选择数据传送性能参数的数据传送公开(公告)号：US07457888B2
公开(公告)日：2008-11-25
申请号：US10756448
申请日：2004-01-12
IPC分类号： G06F3/00
CPC分类号： G06F13/385
摘要： Delivering data from a data input to a data output within a system includes selecting a system performance parameter to be optimized, receiving at the data input a sequence of discrete data words, determining an optimum mode of delivery of the data words to the data output so as to optimize the selected performance parameter, and delivering the data words from the data input to the data output in the determined optimum mode. The optimum mode of delivery may include at least one of an optimum time and sequence of delivery of the data words.
摘要翻译： 将数据从数据输入传送到系统内的数据输出包括选择要优化的系统性能参数，在数据输入处接收一系列离散数据字，确定将数据字传送到数据输出的最佳方式， 以优化所选择的性能参数，并且以确定的最佳模式将数据字从数据输入传送到数据输出。 最佳递送方式可以包括数据字的最佳时间和递送顺序中的至少一个。
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公开(公告)号：US07724758B2
公开(公告)日：2010-05-25
申请号：US10756438
申请日：2004-01-12
IPC分类号： H04L12/28
CPC分类号： H04L47/6265 , H04L47/15 , H04L47/50 , H04L49/30
摘要： Transactions are received through at least two input channels, each transaction comprising one or more data packets. The data packets are placed in a single data queue. When a first transaction received through one input channel comprises more than one data packet, a data packet of a second transaction received through another input channel is permitted to be placed in the single data queue between data packets of the first transaction. A block of space in a data output queue is assigned to each transaction. Each data packet is placed in the block assigned to its transaction.
摘要翻译： 通过至少两个输入通道接收事务，每个事务包括一个或多个数据分组。 数据包被放置在单个数据队列中。 当通过一个输入通道接收到的第一事务包括多于一个数据分组时，允许通过另一个输入通道接收的第二事务的数据分组被放置在第一事务的数据分组之间的单个数据队列中。 数据输出队列中的一个空格块被分配给每个事务。 每个数据包都被放置在分配给它的事务的块中。
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5.发明授权System and method for effectuating the transfer of data blocks including a header block across a clock boundary 有权用于在时钟边界上实现包括报头块的数据块的传送的系统和方法公开(公告)号：US07623482B2
公开(公告)日：2009-11-24
申请号：US10625291
申请日：2003-07-23
IPC分类号： H04B7/212
摘要： A system and method for effectuating the transfer of data blocks including a header block across a clock boundary between a first clock domain and a second clock domain. In one embodiment, a first circuit portion provides the data blocks including the header block to a second circuit portion. Control logic associated with the second circuit portion is operable to process the header block and generate in response to the header block a hint signal which is transferred via a synchronizer at least one data cycle prior to the transfer of the data blocks to a third circuit portion disposed in the second clock domain. A control block associated with the third circuit portion operates responsive to the hint signal to generate data transfer control signals for controlling the third circuit portion in order to control output of the data blocks in a particular ordered grouping.
摘要翻译： 一种用于在第一时钟域和第二时钟域之间的时钟边界上实现包括报头块的数据块的传送的系统和方法。 在一个实施例中，第一电路部分将包括标题块的数据块提供给第二电路部分。 与第二电路部分相关联的控制逻辑可操作以处理报头块，并且响应于报头块生成在经由数据块传送到第三电路部分之前经由同步器传送的至少一个数据周期的提示信号 放置在第二个时钟域。 与第三电路部分相关联的控制块响应于提示信号而操作，以产生用于控制第三电路部分的数据传输控制信号，以便控制特定有序分组中的数据块的输出。
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6.发明授权System and method for effectuating the transfer of data blocks across a clock boundary 失效用于实现跨时钟边界传输数据块的系统和方法公开(公告)号：US07480357B2
公开(公告)日：2009-01-20
申请号：US10625365
申请日：2003-07-23
IPC分类号： H04L7/00
CPC分类号： G06F5/06 , H04L7/0012 , H04L7/005
摘要： A system and method for effectuating the transfer of data blocks having intervals across a clock boundary between a first clock domain and a second clock domain. A first circuit portion provides the data blocks to a second circuit portion. A synchronizer controller disposed between the first and second clock domains provides at least one dead cycle control signal to the second circuit portion, which is indicative of the location of at least one dead cycle between the first and second clock signals. Control logic associated with the second circuit portion generates data transfer control signals responsive to the at least one dead cycle control signal in order to control the second circuit portion so that the data blocks may be transmitted as contiguous data blocks relative to the at least one dead cycle.
摘要翻译： 一种用于实现在第一时钟域和第二时钟域之间跨时钟边界具有间隔的数据块的传送的系统和方法。 第一电路部分将数据块提供给第二电路部分。 设置在第一和第二时钟域之间的同步器控制器向第二电路部分提供至少一个死循环控制信号，其指示第一和第二时钟信号之间的至少一个死循环的位置。 与第二电路部分相关联的控制逻辑响应于至少一个死循环控制信号产生数据传输控制信号，以便控制第二电路部分，使得数据块可相对于至少一个死区 周期。
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7.发明授权Systems and methods to insert broadcast transactions into a fast data stream of transactions 有权将广播事务插入快速数据流事务的系统和方法公开(公告)号：US07447205B2
公开(公告)日：2008-11-04
申请号：US10435639
申请日：2003-05-09
IPC分类号： H04L12/56
CPC分类号： G06F13/4027
摘要： Systems and methods insert broadcast transactions into a fast data stream of transactions. Header packets of transactions of one or more fast data streams are processed into a single fast data stream. Header packets of one of the transactions are generated if the one transaction is a broadcast transaction. Data packets of the transactions of the fast data streams are processed into the single fast data stream such that data packets associated with the one transaction are generated in accordance with a header packet of the one transaction.
摘要翻译： 系统和方法将广播事务插入到快速的事务数据流中。 将一个或多个快速数据流的事务的报头分组处理成单个快速数据流。 如果一个事务是广播事务，则生成其中一个事务的报头分组。 将快速数据流的事务的数据分组处理成单个快速数据流，使得与一个事务相关联的数据分组根据一个事务的报头分组被生成。
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