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    Data transition detect write control
    1.
    发明授权
    Data transition detect write control 失效
    数据转换检测写入控制

    公开(公告)号：US5751644A

    公开(公告)日：1998-05-12

    申请号：US756634

    申请日：1996-11-26

    申请人： George M. Ansel ,  Jeffery Scott Hunt ,  Ping Wu ,  David A. Lindley ,  Andrew L. Hawkins

    发明人： George M. Ansel ,  Jeffery Scott Hunt ,  Ping Wu ,  David A. Lindley ,  Andrew L. Hawkins

    IPC分类号： B01F7/00 ,  G11C11/407

    CPC分类号： G11C7/1087 ,  G11C7/1093 ,  G11C7/1096

    摘要： The present invention concerns data transition method and apparatus for driving a set of write data signals to an inactive (or deasserted) state upon completion of a WRITE to a particular group of memory cells. The present invention drives the write data signals to a an inactive state to end a WRITE without waiting for the end of the write control pulse. The present invention triggers a group of data write buffers to drive one of the write data signals to a "0" at the beginning of the WRITE control pulse or at a data input transition during a WRITE. A delayed transition of the write data signals may be used to drive both the write data signals to a "1"� to end the WRITE within a particular memory group. The write data transition detection is accomplished at the write data inputs of the groups of memory cells without relying on global chip data input pin transition detection and pulse width setting. The data setup to the end of WRITE is generally not compromised since the path from chip data input to the input to the write data signals is generally similar to existing implementations.

    摘要翻译： 本发明涉及数据转换方法和装置，用于在完成对特定组存储器单元的写入时将一组写入数据信号驱动到无效（或无效）状态。 本发明将写入数据信号驱动到非活动状态以结束写入而不等待写入控制脉冲的结束。 本发明触发一组数据写入缓冲器，以在WRITE控制脉冲开始时或写入期间的数据输入转换时将写数据信号之一驱动为“0”。 可以使用写入数据信号的延迟转换来将写入数据信号驱动为“1”|以结束特定存储器组中的写入。 在不依赖于全局芯片数据输入引脚转换检测和脉冲宽度设置的情况下，在存储器单元组的写入数据输入端实现写入数据转换检测。 由于从芯片数据输入到输入到写入数据信号的路径通常与现有实现相似，因此通常不会影响写入结束的数据设置。