Systems and methods for inter-track interference compensation
    1.
    发明授权
    Systems and methods for inter-track interference compensation 有权
    轨道间干扰补偿的系统和方法

    公开(公告)号:US08804260B2

    公开(公告)日:2014-08-12

    申请号:US13186174

    申请日:2011-07-19

    IPC分类号: G11B5/09

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,讨论了包括数据缓冲器,轨道间干扰响应电路和轨道间干扰信号估计器电路的数据处理电路。 数据缓冲器可操作以存储先前的轨迹数据集。 轨道间干扰响应电路可用于至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自先前轨道数据集的轨道间干扰响应。 轨道间干扰信号估计器电路可用于至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算来自先前轨道数据集的轨道间干扰。

    Systems and Methods for Handling Sector Gaps in Inter-track Interference Compensation
    3.
    发明申请
    Systems and Methods for Handling Sector Gaps in Inter-track Interference Compensation 有权
    用于处理轨道间干扰补偿中的扇区间隙的系统和方法

    公开(公告)号:US20120063024A1

    公开(公告)日:2012-03-15

    申请号:US13186197

    申请日:2011-07-19

    IPC分类号: G11B5/02

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes an inter-track interference determination circuit operable to calculate an inter-track interference from a previous track data set based at least in part on the previous track data set and a current track data set. The previous track data set includes a gap. A portion of the data in the previous track data set corresponds to a previous track on a storage medium, and the data in the previous track data set corresponding to the gap corresponds to a track preceding a previous track.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,讨论了包括轨道间干扰确定电路的数据处理电路,其可操作以至少部分地基于先前的轨道数据集和当前轨道数据集来计算来自先前轨道数据集的轨道间干扰 。 先前的轨道数据集包括间隙。 前一轨道数据集中的一部分数据对应于存储介质上的先前磁道,并且与该间隙相对应的先前磁道数据集中的数据对应于先前磁道之前的磁迹。

    Systems and Methods for Inter-track Interference Compensation
    4.
    发明申请
    Systems and Methods for Inter-track Interference Compensation 有权
    轨道间干扰补偿的系统和方法

    公开(公告)号:US20120063022A1

    公开(公告)日:2012-03-15

    申请号:US13186174

    申请日:2011-07-19

    IPC分类号: G11B5/09

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,讨论了包括数据缓冲器,轨道间干扰响应电路和轨道间干扰信号估计器电路的数据处理电路。 数据缓冲器可操作以存储先前的轨迹数据集。 轨道间干扰响应电路可用于至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自先前轨道数据集的轨道间干扰响应。 轨道间干扰信号估计器电路可用于至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算来自先前轨道数据集的轨道间干扰。

    Systems and methods for block-wise inter-track interference compensation
    5.
    发明授权
    Systems and methods for block-wise inter-track interference compensation 有权
    用于块式轨道间干扰补偿的系统和方法

    公开(公告)号:US08773794B2

    公开(公告)日:2014-07-08

    申请号:US13186213

    申请日:2011-07-19

    IPC分类号: G11B5/09

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a block-wise data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set corresponding to a block. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set across the block based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set across the block based at least in part on the previous track data set and the inter-track interference response from the previous track data set.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,讨论了包括数据缓冲器,轨道间干扰响应电路和轨道间干扰信号估计器电路的块状数据处理电路。 数据缓冲器可操作以存储对应于块的先前轨道数据集。 轨道间干扰响应电路可操作以至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自块的前一轨道数据集的轨道间干扰响应。 轨道间干扰信号估计器电路可操作以至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算跨越块的先前轨道数据集的轨道间干扰 。

    Systems and Methods for Block-wise Inter-track Interference Compensation
    6.
    发明申请
    Systems and Methods for Block-wise Inter-track Interference Compensation 有权
    块式轨道间干扰补偿的系统和方法

    公开(公告)号:US20120063023A1

    公开(公告)日:2012-03-15

    申请号:US13186213

    申请日:2011-07-19

    IPC分类号: G11B5/09

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a block-wise data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set corresponding to a block. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set across the block based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set across the block based at least in part on the previous track data set and the inter-track interference response from the previous track data set.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,讨论了包括数据缓冲器,轨道间干扰响应电路和轨道间干扰信号估计器电路的块状数据处理电路。 数据缓冲器可操作以存储对应于块的先前轨道数据集。 轨道间干扰响应电路可操作以至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自块的前一轨道数据集的轨道间干扰响应。 轨道间干扰信号估计器电路可操作以至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算跨越块的先前轨道数据集的轨道间干扰 。

    Systems and methods for track to track phase alignment
    7.
    发明授权
    Systems and methods for track to track phase alignment 有权
    轨道跟踪相位对准的系统和方法

    公开(公告)号:US08379498B2

    公开(公告)日:2013-02-19

    申请号:US13186146

    申请日:2011-07-19

    IPC分类号: G11B5/09

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, an inter-track interference signal estimator circuit, and a sync mark detector circuit. The data buffer is operable to store a previous track data set that includes a first sync pattern. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The current track data set includes a second sync pattern. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set. The sync mark detector circuit operable to identify the first sync pattern in the inter-track interference from the previous track data set in the current track data set.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,讨论了包括数据缓冲器,轨道间干扰响应电路,轨道间干扰信号估计器电路和同步标记检测器电路的数据处理电路。 数据缓冲器可操作以存储包括第一同步模式的先前轨迹数据集。 轨道间干扰响应电路可用于至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自先前轨道数据集的轨道间干扰响应。 当前轨道数据集包括第二同步模式。 轨道间干扰信号估计器电路可用于至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算来自先前轨道数据集的轨道间干扰。 同步标记检测器电路可用于识别来自当前轨道数据集中的先前轨道数据集的轨道间干扰中的第一同步模式。

    Systems and Methods for Track to Track Phase Alignment
    8.
    发明申请
    Systems and Methods for Track to Track Phase Alignment 有权
    轨道跟踪相位对准的系统和方法

    公开(公告)号:US20120063284A1

    公开(公告)日:2012-03-15

    申请号:US13186146

    申请日:2011-07-19

    IPC分类号: G11B27/36

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, an inter-track interference signal estimator circuit, and a sync mark detector circuit. The data buffer is operable to store a previous track data set that includes a first sync pattern. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The current track data set includes a second sync pattern. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set. The sync mark detector circuit operable to identify the first sync pattern in the inter-track interference from the previous track data set in the current track data set.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,讨论了包括数据缓冲器,轨道间干扰响应电路,轨道间干扰信号估计器电路和同步标记检测器电路的数据处理电路。 数据缓冲器可操作以存储包括第一同步模式的先前轨迹数据集。 轨道间干扰响应电路可用于至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自先前轨道数据集的轨道间干扰响应。 当前轨道数据集包括第二同步模式。 轨道间干扰信号估计器电路可用于至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算来自前一轨迹数据集的轨道间干扰。 同步标记检测器电路可用于识别来自当前轨道数据集中的先前轨道数据集的轨道间干扰中的第一同步模式。

    STORAGE MEDIA INTER-TRACK INTERFERENCE CANCELLATION
    10.
    发明申请
    STORAGE MEDIA INTER-TRACK INTERFERENCE CANCELLATION 有权
    存储媒体互联干扰消除

    公开(公告)号:US20130223199A1

    公开(公告)日:2013-08-29

    申请号:US13591980

    申请日:2012-08-22

    IPC分类号: G11B20/10

    摘要: Described embodiments provide a method of cancelling inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads sectors in a desired track of the storage medium. An iterative decoder of the read channel decodes the read sectors, and if the read sectors are incorrectly recovered from the storage medium, selected sectors of a first adjacent track are read. An ITI canceller of the read channel estimates ITI in the read sectors of the desired track corresponding to the selected sectors of the adjacent track and subtracts the estimated ITI of the adjacent track from the data for the sectors of the desired track, providing updated sector data. The ITI cancelled data is replayed to the iterative decoder, which decodes the ITI cancelled data and provides the decoded ITI cancelled data as output data of the read channel.

    摘要翻译: 所描述的实施例提供了从存储介质的期望轨迹读取的一个或多个扇区消除轨道间干扰(ITI)的方法。 读通道读取存储介质的期望轨道中的扇区。 读通道的迭代解码器解码读扇区,并且如果从存储介质错误地恢复读扇区,则读取第一相邻轨道的选定扇区。 读通道的ITI消除器估计对应于相邻磁道的所选扇区的期望磁道的读扇区中的ITI,并从期望磁道的扇区的数据中减去相邻磁迹的估计ITI,从而提供更新的扇区数据 。 ITI取消的数据被重播到迭代解码器,该解码器对ITI取消的数据进行解码,并将解码的ITI取消的数据作为读取通道的输出数据提供。