公开(公告)号：US08773794B2

公开(公告)日：2014-07-08

申请号：US13186213

申请日：2011-07-19

申请人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch

发明人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch

IPC分类号： G11B5/09

CPC分类号： G11B20/10046 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10398 ,  G11B20/1217 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a block-wise data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set corresponding to a block. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set across the block based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set across the block based at least in part on the previous track data set and the inter-track interference response from the previous track data set.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路和轨道间干扰信号估计器电路的块状数据处理电路。 数据缓冲器可操作以存储对应于块的先前轨道数据集。 轨道间干扰响应电路可操作以至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自块的前一轨道数据集的轨道间干扰响应。 轨道间干扰信号估计器电路可操作以至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算跨越块的先前轨道数据集的轨道间干扰 。

公开(公告)号：US08804260B2

公开(公告)日：2014-08-12

申请号：US13186174

申请日：2011-07-19

申请人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch ,  Ming Jin ,  Yuan Xing Lee

发明人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch ,  Ming Jin ,  Yuan Xing Lee

IPC分类号： G11B5/09

CPC分类号： G11B20/10046 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10398 ,  G11B20/1217 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路和轨道间干扰信号估计器电路的数据处理电路。 数据缓冲器可操作以存储先前的轨迹数据集。 轨道间干扰响应电路可用于至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自先前轨道数据集的轨道间干扰响应。 轨道间干扰信号估计器电路可用于至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算来自先前轨道数据集的轨道间干扰。

公开(公告)号：US08681439B2

公开(公告)日：2014-03-25

申请号：US13186197

申请日：2011-07-19

申请人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch ,  Ming Jin

发明人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch ,  Ming Jin

IPC分类号： G11B27/36 ,  G11B5/00

CPC分类号： G11B20/10046 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10398 ,  G11B20/1217 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes an inter-track interference determination circuit operable to calculate an inter-track interference from a previous track data set based at least in part on the previous track data set and a current track data set. The previous track data set includes a gap. A portion of the data in the previous track data set corresponds to a previous track on a storage medium, and the data in the previous track data set corresponding to the gap corresponds to a track preceding a previous track.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括轨道间干扰确定电路的数据处理电路，其可操作以至少部分地基于先前的轨道数据集和当前轨道数据集来计算来自先前轨道数据集的轨道间干扰 。 先前的轨道数据集包括间隙。 前一轨道数据集中的一部分数据对应于存储介质上的先前磁道，并且与该间隙相对应的先前磁道数据集中的数据对应于先前磁道之前的磁迹。

公开(公告)号：US20120063024A1

公开(公告)日：2012-03-15

申请号：US13186197

申请日：2011-07-19

申请人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch ,  Ming Jin

发明人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch ,  Ming Jin

IPC分类号： G11B5/02

CPC分类号： G11B20/10046 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10398 ,  G11B20/1217 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes an inter-track interference determination circuit operable to calculate an inter-track interference from a previous track data set based at least in part on the previous track data set and a current track data set. The previous track data set includes a gap. A portion of the data in the previous track data set corresponds to a previous track on a storage medium, and the data in the previous track data set corresponding to the gap corresponds to a track preceding a previous track.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括轨道间干扰确定电路的数据处理电路，其可操作以至少部分地基于先前的轨道数据集和当前轨道数据集来计算来自先前轨道数据集的轨道间干扰 。 先前的轨道数据集包括间隙。 前一轨道数据集中的一部分数据对应于存储介质上的先前磁道，并且与该间隙相对应的先前磁道数据集中的数据对应于先前磁道之前的磁迹。

公开(公告)号：US20120063023A1

公开(公告)日：2012-03-15

申请号：US13186213

申请日：2011-07-19

申请人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch

发明人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch

IPC分类号： G11B5/09

CPC分类号： G11B20/10046 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10398 ,  G11B20/1217 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a block-wise data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set corresponding to a block. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set across the block based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set across the block based at least in part on the previous track data set and the inter-track interference response from the previous track data set.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路和轨道间干扰信号估计器电路的块状数据处理电路。 数据缓冲器可操作以存储对应于块的先前轨道数据集。 轨道间干扰响应电路可操作以至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自块的前一轨道数据集的轨道间干扰响应。 轨道间干扰信号估计器电路可操作以至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算跨越块的先前轨道数据集的轨道间干扰 。

公开(公告)号：US20120063022A1

公开(公告)日：2012-03-15

申请号：US13186174

申请日：2011-07-19

申请人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch ,  Ming Jin ,  Yuan Xing Lee

发明人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch ,  Ming Jin ,  Yuan Xing Lee

IPC分类号： G11B5/09

CPC分类号： G11B20/10046 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10398 ,  G11B20/1217 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路和轨道间干扰信号估计器电路的数据处理电路。 数据缓冲器可操作以存储先前的轨迹数据集。 轨道间干扰响应电路可用于至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自先前轨道数据集的轨道间干扰响应。 轨道间干扰信号估计器电路可用于至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算来自先前轨道数据集的轨道间干扰。

公开(公告)号：US08379498B2

公开(公告)日：2013-02-19

申请号：US13186146

申请日：2011-07-19

申请人： George Mathew ,  Ming Jin ,  Shaohua Yang ,  Erich F. Haratsch

发明人： George Mathew ,  Ming Jin ,  Shaohua Yang ,  Erich F. Haratsch

IPC分类号： G11B5/09

CPC分类号： G11B20/10046 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10398 ,  G11B20/1217 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, an inter-track interference signal estimator circuit, and a sync mark detector circuit. The data buffer is operable to store a previous track data set that includes a first sync pattern. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The current track data set includes a second sync pattern. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set. The sync mark detector circuit operable to identify the first sync pattern in the inter-track interference from the previous track data set in the current track data set.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路，轨道间干扰信号估计器电路和同步标记检测器电路的数据处理电路。 数据缓冲器可操作以存储包括第一同步模式的先前轨迹数据集。 轨道间干扰响应电路可用于至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自先前轨道数据集的轨道间干扰响应。 当前轨道数据集包括第二同步模式。 轨道间干扰信号估计器电路可用于至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算来自先前轨道数据集的轨道间干扰。 同步标记检测器电路可用于识别来自当前轨道数据集中的先前轨道数据集的轨道间干扰中的第一同步模式。

公开(公告)号：US20120063284A1

公开(公告)日：2012-03-15

申请号：US13186146

申请日：2011-07-19

申请人： George Mathew ,  Ming Jin ,  Shaohua Yang ,  Erich F. Haratsch

发明人： George Mathew ,  Ming Jin ,  Shaohua Yang ,  Erich F. Haratsch

IPC分类号： G11B27/36

CPC分类号： G11B20/10046 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10398 ,  G11B20/1217 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, an inter-track interference signal estimator circuit, and a sync mark detector circuit. The data buffer is operable to store a previous track data set that includes a first sync pattern. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The current track data set includes a second sync pattern. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set. The sync mark detector circuit operable to identify the first sync pattern in the inter-track interference from the previous track data set in the current track data set.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路，轨道间干扰信号估计器电路和同步标记检测器电路的数据处理电路。 数据缓冲器可操作以存储包括第一同步模式的先前轨迹数据集。 轨道间干扰响应电路可用于至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自先前轨道数据集的轨道间干扰响应。 当前轨道数据集包括第二同步模式。 轨道间干扰信号估计器电路可用于至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算来自前一轨迹数据集的轨道间干扰。 同步标记检测器电路可用于识别来自当前轨道数据集中的先前轨道数据集的轨道间干扰中的第一同步模式。

公开(公告)号：US08879182B2

公开(公告)日：2014-11-04

申请号：US13591937

申请日：2012-08-22

申请人： Erich Franz Haratsch ,  George Mathew ,  Ming Jin ,  Jongseung Park ,  Timothy W. Swatosh ,  Timothy B. Lund ,  Carl E. Forhan

发明人： Erich Franz Haratsch ,  George Mathew ,  Ming Jin ,  Jongseung Park ,  Timothy W. Swatosh ,  Timothy B. Lund ,  Carl E. Forhan

IPC分类号： G11B5/09 ,  G11B20/10 ,  G11B19/04 ,  G11B5/012 ,  G11B20/14 ,  G11B20/12 ,  G11B20/18

CPC分类号： G11B5/09 ,  G11B5/012 ,  G11B19/045 ,  G11B20/10046 ,  G11B20/10212 ,  G11B20/10462 ,  G11B20/1217 ,  G11B20/1423 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2020/183 ,  G11B2020/185 ,  G11B2020/1856 ,  G11B2220/2516

摘要： Described embodiments provide a method of cancelling inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A road channel reads sectors in a desired track of the storage medium. A decoder of the read channel decodes the read sectors, and if the read sectors are incorrectly recovered from the storage medium, selected sectors of a first adjacent track and a second adjacent track are read. An ITI canceller of the read channel estimates ITI in the read sectors of the desired track corresponding to the selected sectors of each adjacent track and subtracts the estimated ITI of each adjacent track from the data for the sectors of the desired track, providing updated sector data. The ITI cancelled data is replayed to the decoder, which decodes the ITI cancelled data and provides the decoded ITI cancelled data as output of the read channel.

摘要翻译： 所描述的实施例提供了从存储介质的期望轨迹读取的一个或多个扇区消除轨道间干扰（ITI）的方法。 道路通道读取存储介质的期望轨道中的扇区。 读通道的解码器解码读扇区，并且如果从存储介质中错误地恢复读扇区，则读取第一相邻轨道和第二相邻轨道的选定扇区。 读通道的ITI消除器估计对应于每个相邻磁道的所选扇区的期望磁道的读扇区中的ITI，并从期望磁道的扇区的数据中减去每个相邻磁道的估计ITI，从而提供更新的扇区数据 。 ITI取消的数据被重播到解码器，解码器解码ITI取消的数据，并将解码的ITI取消数据作为读通道的输出。

公开(公告)号：US07872823B2

公开(公告)日：2011-01-18

申请号：US12352540

申请日：2009-01-12

申请人： Jingfeng Liu ,  Hongwei Song ,  Jongseung Park ,  George Mathew ,  Yuan Xing Lee

发明人： Jingfeng Liu ,  Hongwei Song ,  Jongseung Park ,  George Mathew ,  Yuan Xing Lee

IPC分类号： G11B5/09

CPC分类号： G11B5/09 ,  G11B20/10009 ,  G11B20/10027 ,  G11B20/10046 ,  H03G3/30 ,  H03M1/185

摘要： Various embodiments of the present invention provide systems and methods for gain control. For example, some embodiments of the present invention provide variable gain control circuits. Such circuits include a zero forcing loop generating a zero forcing feedback and a least mean square loop generating a least mean square feedback. An error quantization circuit generates a hybrid feedback based upon a threshold condition using the zero forcing feedback and the least mean square feedback. A variable gain amplifier is at least in part controlled by a derivative of the hybrid feedback.

摘要翻译： 本发明的各种实施例提供用于增益控制的系统和方法。 例如，本发明的一些实施例提供可变增益控制电路。 这种电路包括产生零强制反馈的零强制环路和产生最小均方反馈的最小均方环路。 误差量化电路使用零强制反馈和最小均方反馈基于阈值条件产生混合反馈。 可变增益放大器至少部分地由混合反馈的导数来控制。