公开(公告)号：US08379498B2

公开(公告)日：2013-02-19

申请号：US13186146

申请日：2011-07-19

申请人： George Mathew ,  Ming Jin ,  Shaohua Yang ,  Erich F. Haratsch

发明人： George Mathew ,  Ming Jin ,  Shaohua Yang ,  Erich F. Haratsch

IPC分类号： G11B5/09

CPC分类号： G11B20/10046 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10398 ,  G11B20/1217 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, an inter-track interference signal estimator circuit, and a sync mark detector circuit. The data buffer is operable to store a previous track data set that includes a first sync pattern. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The current track data set includes a second sync pattern. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set. The sync mark detector circuit operable to identify the first sync pattern in the inter-track interference from the previous track data set in the current track data set.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路，轨道间干扰信号估计器电路和同步标记检测器电路的数据处理电路。 数据缓冲器可操作以存储包括第一同步模式的先前轨迹数据集。 轨道间干扰响应电路可用于至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自先前轨道数据集的轨道间干扰响应。 当前轨道数据集包括第二同步模式。 轨道间干扰信号估计器电路可用于至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算来自先前轨道数据集的轨道间干扰。 同步标记检测器电路可用于识别来自当前轨道数据集中的先前轨道数据集的轨道间干扰中的第一同步模式。

公开(公告)号：US08804260B2

公开(公告)日：2014-08-12

申请号：US13186174

申请日：2011-07-19

申请人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch ,  Ming Jin ,  Yuan Xing Lee

发明人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch ,  Ming Jin ,  Yuan Xing Lee

IPC分类号： G11B5/09

CPC分类号： G11B20/10046 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10398 ,  G11B20/1217 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路和轨道间干扰信号估计器电路的数据处理电路。 数据缓冲器可操作以存储先前的轨迹数据集。 轨道间干扰响应电路可用于至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自先前轨道数据集的轨道间干扰响应。 轨道间干扰信号估计器电路可用于至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算来自先前轨道数据集的轨道间干扰。

公开(公告)号：US08681439B2

公开(公告)日：2014-03-25

申请号：US13186197

申请日：2011-07-19

申请人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch ,  Ming Jin

发明人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch ,  Ming Jin

IPC分类号： G11B27/36 ,  G11B5/00

CPC分类号： G11B20/10046 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10398 ,  G11B20/1217 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes an inter-track interference determination circuit operable to calculate an inter-track interference from a previous track data set based at least in part on the previous track data set and a current track data set. The previous track data set includes a gap. A portion of the data in the previous track data set corresponds to a previous track on a storage medium, and the data in the previous track data set corresponding to the gap corresponds to a track preceding a previous track.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括轨道间干扰确定电路的数据处理电路，其可操作以至少部分地基于先前的轨道数据集和当前轨道数据集来计算来自先前轨道数据集的轨道间干扰 。 先前的轨道数据集包括间隙。 前一轨道数据集中的一部分数据对应于存储介质上的先前磁道，并且与该间隙相对应的先前磁道数据集中的数据对应于先前磁道之前的磁迹。

公开(公告)号：US20120063284A1

公开(公告)日：2012-03-15

申请号：US13186146

申请日：2011-07-19

申请人： George Mathew ,  Ming Jin ,  Shaohua Yang ,  Erich F. Haratsch

发明人： George Mathew ,  Ming Jin ,  Shaohua Yang ,  Erich F. Haratsch

IPC分类号： G11B27/36

CPC分类号： G11B20/10046 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10398 ,  G11B20/1217 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, an inter-track interference signal estimator circuit, and a sync mark detector circuit. The data buffer is operable to store a previous track data set that includes a first sync pattern. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The current track data set includes a second sync pattern. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set. The sync mark detector circuit operable to identify the first sync pattern in the inter-track interference from the previous track data set in the current track data set.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路，轨道间干扰信号估计器电路和同步标记检测器电路的数据处理电路。 数据缓冲器可操作以存储包括第一同步模式的先前轨迹数据集。 轨道间干扰响应电路可用于至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自先前轨道数据集的轨道间干扰响应。 当前轨道数据集包括第二同步模式。 轨道间干扰信号估计器电路可用于至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算来自前一轨迹数据集的轨道间干扰。 同步标记检测器电路可用于识别来自当前轨道数据集中的先前轨道数据集的轨道间干扰中的第一同步模式。

公开(公告)号：US20120063024A1

公开(公告)日：2012-03-15

申请号：US13186197

申请日：2011-07-19

申请人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch ,  Ming Jin

发明人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch ,  Ming Jin

IPC分类号： G11B5/02

CPC分类号： G11B20/10046 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10398 ,  G11B20/1217 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes an inter-track interference determination circuit operable to calculate an inter-track interference from a previous track data set based at least in part on the previous track data set and a current track data set. The previous track data set includes a gap. A portion of the data in the previous track data set corresponds to a previous track on a storage medium, and the data in the previous track data set corresponding to the gap corresponds to a track preceding a previous track.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括轨道间干扰确定电路的数据处理电路，其可操作以至少部分地基于先前的轨道数据集和当前轨道数据集来计算来自先前轨道数据集的轨道间干扰 。 先前的轨道数据集包括间隙。 前一轨道数据集中的一部分数据对应于存储介质上的先前磁道，并且与该间隙相对应的先前磁道数据集中的数据对应于先前磁道之前的磁迹。

公开(公告)号：US20120063022A1

公开(公告)日：2012-03-15

申请号：US13186174

申请日：2011-07-19

申请人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch ,  Ming Jin ,  Yuan Xing Lee

发明人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch ,  Ming Jin ,  Yuan Xing Lee

IPC分类号： G11B5/09

CPC分类号： G11B20/10046 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10398 ,  G11B20/1217 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路和轨道间干扰信号估计器电路的数据处理电路。 数据缓冲器可操作以存储先前的轨迹数据集。 轨道间干扰响应电路可用于至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自先前轨道数据集的轨道间干扰响应。 轨道间干扰信号估计器电路可用于至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算来自先前轨道数据集的轨道间干扰。

公开(公告)号：US08773794B2

公开(公告)日：2014-07-08

申请号：US13186213

申请日：2011-07-19

申请人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch

发明人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch

IPC分类号： G11B5/09

CPC分类号： G11B20/10046 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10398 ,  G11B20/1217 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a block-wise data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set corresponding to a block. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set across the block based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set across the block based at least in part on the previous track data set and the inter-track interference response from the previous track data set.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路和轨道间干扰信号估计器电路的块状数据处理电路。 数据缓冲器可操作以存储对应于块的先前轨道数据集。 轨道间干扰响应电路可操作以至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自块的前一轨道数据集的轨道间干扰响应。 轨道间干扰信号估计器电路可操作以至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算跨越块的先前轨道数据集的轨道间干扰 。

公开(公告)号：US20120063023A1

公开(公告)日：2012-03-15

申请号：US13186213

申请日：2011-07-19

申请人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch

发明人： George Mathew ,  Jongseung Park ,  Shaohua Yang ,  Erich F. Haratsch

IPC分类号： G11B5/09

CPC分类号： G11B20/10046 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10398 ,  G11B20/1217 ,  G11B2020/10759 ,  G11B2020/1232 ,  G11B2020/1298 ,  G11B2220/2516

摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a block-wise data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set corresponding to a block. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set across the block based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set across the block based at least in part on the previous track data set and the inter-track interference response from the previous track data set.

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路和轨道间干扰信号估计器电路的块状数据处理电路。 数据缓冲器可操作以存储对应于块的先前轨道数据集。 轨道间干扰响应电路可操作以至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自块的前一轨道数据集的轨道间干扰响应。 轨道间干扰信号估计器电路可操作以至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算跨越块的先前轨道数据集的轨道间干扰 。

公开(公告)号：US08526133B2

公开(公告)日：2013-09-03

申请号：US13185562

申请日：2011-07-19

申请人： Haitao Xia ,  George Mathew ,  Ming Jin ,  Shaohua Yang

发明人： Haitao Xia ,  George Mathew ,  Ming Jin ,  Shaohua Yang

IPC分类号： G11B21/02

CPC分类号： G11B5/6029

摘要： Various embodiments of the present invention provide systems and methods for calculating and/or modifying fly height. For example, a circuit for calculating fly height is disclosed that includes: a first pattern detector circuit, a second pattern detector circuit, a first pattern fly height calculation circuit, a second pattern fly height calculation circuit, a first averaging circuit, a second averaging circuit, and a combining circuit.

摘要翻译： 本发明的各种实施例提供了用于计算和/或修改飞行高度的系统和方法。 例如，公开了一种用于计算飞行高度的电路，其包括：第一模式检测器电路，第二模式检测器电路，第一模式飞行高度计算电路，第二模式飞行高度计算电路，第一平均电路，第二平均 电路和组合电路。

公开(公告)号：US20130021690A1

公开(公告)日：2013-01-24

申请号：US13185562

申请日：2011-07-19

申请人： Haitao Xia ,  George Mathew ,  Ming Jin ,  Shaohua Yang

发明人： Haitao Xia ,  George Mathew ,  Ming Jin ,  Shaohua Yang

IPC分类号： G11B21/12 ,  G11B5/09 ,  G11B20/18

CPC分类号： G11B5/6029

摘要： Various embodiments of the present invention provide systems and methods for calculating and/or modifying fly height. For example, a circuit for calculating fly height is disclosed that includes: a first pattern detector circuit, a second pattern detector circuit, a first pattern fly height calculation circuit, a second pattern fly height calculation circuit, a first averaging circuit, a second averaging circuit, and a combining circuit.

摘要翻译： 本发明的各种实施例提供了用于计算和/或修改飞行高度的系统和方法。 例如，公开了一种用于计算飞行高度的电路，其包括：第一模式检测器电路，第二模式检测器电路，第一模式飞行高度计算电路，第二模式飞行高度计算电路，第一平均电路，第二平均 电路和组合电路。