-
公开(公告)号：US11482669B2
公开(公告)日：2022-10-25
申请号：US16565524
申请日：2019-09-10
发明人： Jianxun Sun , Juan Boon Tan , Tu Pei Chen , Shyue Seng Tan
摘要： A memory device may include a first conductor and a second conductor; a switching layer arranged between the first conductor and the second conductor, and one or more magnetic layers. The switching layer may be configured to have a switchable resistance in response to a change in voltage between the first conductor and the second conductor. The one or more magnetic layers may be arranged such that the one or more magnetic layers provide a magnetic field through the switching layer.
-
公开(公告)号：US20240365566A1
公开(公告)日：2024-10-31
申请号：US18140677
申请日：2023-04-28
发明人： Kai Kang , Curtis Chun-I Hsieh , Jianxun Sun , Juan Boon Tan
IPC分类号： H10B63/00
CPC分类号： H10B63/80
摘要： Structures for a resistive random-access memory element and methods of forming a structure for a resistive random-access memory element. The structure comprises an interlayer dielectric layer including a first trench having a sidewall and a second trench having a sidewall adjacent to the sidewall of the first trench. The structure further comprises a first layer on the sidewall of the first trench, a second layer inside the second trench, and a third layer on the sidewall of the second trench. The first layer comprises a first metal, the second layer comprises a second metal, and the third layer comprises a dielectric material. The third layer includes a portion positioned between the first layer and the second layer.
-
公开(公告)号：US11716914B2
公开(公告)日：2023-08-01
申请号：US17094819
申请日：2020-11-11
发明人： Jianxun Sun , Juan Boon Tan , Tupei Chen
CPC分类号： H10N70/841 , H10B63/00 , H10N70/021 , H10N70/063
摘要： A memory device and method of making the same is provided. The memory device comprises a first electrode having a length along a first axis, a second electrode having a length along a second axis that is perpendicular to the first axis, and a switching layer adjacent to the first electrode. A portion of the switching layer is positioned between a first electrode edge and a second electrode portion. The cross-sections of the first and second electrodes may have a polygonal shape.
-
公开(公告)号：US11276460B2
公开(公告)日：2022-03-15
申请号：US16556729
申请日：2019-08-30
发明人： Jianxun Sun , Juan Boon Tan , Tu Pei Chen , Eng Huat Toh
IPC分类号： H01G9/00 , G11C11/42 , H01L27/105 , H01G9/04 , H01G9/20
摘要： Structures for an optoelectronic memory and related fabrication methods. A metal oxide layer is located on an interlayer dielectric layer. A layer composed of a donor/acceptor dye is positioned on a portion of the first layer.
-
公开(公告)号：US11856875B2
公开(公告)日：2023-12-26
申请号：US17134572
申请日：2020-12-28
发明人： Jianxun Sun , Juan Boon Tan , Eng Huat Toh
CPC分类号： H10N70/823 , H10B63/80 , H10N70/063 , H10N70/841 , H10N70/24 , H10N70/883 , H10N70/8833
摘要： A memory device may be provided. The memory device may include a first electrode including a first side surface and a second side surface opposite to the first side surface; a passivation layer arranged laterally alongside the first side surface of the first electrode; a switching layer arranged laterally alongside the passivation layer; and a second electrode arranged along the switching layer.
-
公开(公告)号：US20210065788A1
公开(公告)日：2021-03-04
申请号：US16556729
申请日：2019-08-30
发明人： Jianxun Sun , Juan Boon Tan , Tu Pei Chen , Eng Huat Toh
IPC分类号： G11C11/42 , H01L27/105 , H01G9/20 , H01G9/00 , H01G9/04
摘要： Structures for an optoelectronic memory and related fabrication methods. A metal oxide layer is located on an interlayer dielectric layer. A layer composed of a donor/acceptor dye is positioned on a portion of the first layer.
-
公开(公告)号：US12102020B2
公开(公告)日：2024-09-24
申请号：US17647006
申请日：2022-01-04
IPC分类号： H10N70/00
CPC分类号： H10N70/828 , H10N70/063 , H10N70/826 , H10N70/8418
摘要： A semiconductor memory device is provided. The memory device includes a first electrode, a resistive layer, and a second electrode. The resistive layer is arranged over the first electrode. The second electrode is arranged over the resistive layer. The second electrode includes a lower surface and an extension extending from under the lower surface. The extension is at least partially arranged within the resistive layer.
-
公开(公告)号：US11818969B2
公开(公告)日：2023-11-14
申请号：US17096950
申请日：2020-11-13
发明人： Jianxun Sun , Juan Boon Tan , Tupei Chen
CPC分类号： H10N70/841 , H10B63/00 , H10N70/021 , H10N70/063 , H10N70/8833
摘要： The disclosed subject matter relates generally to memory devices and a method of forming the same. More particularly, the present disclosure relates to resistive random-access (ReRAM) memory devices. The present disclosure provides a memory device including a first electrode having tapered sides that converge at a top of the first electrode, a dielectric layer disposed on and conforming to the tapered sides of the first electrode, a resistive layer in contact with the top of the first electrode and the dielectric layer, and a second electrode disposed on the resistive layer.
-
-
-
-
-
-
-
搜索结果
8 条记录 (耗时 0.016 秒)
