公开(公告)号：US20230261062A1

公开(公告)日：2023-08-17

申请号：US17671879

申请日：2022-02-15

Applicant: GlobalFoundries U.S. Inc.

Inventor： Uppili Raghunathan ,  Vibhor Jain ,  Sebastian Ventrone ,  Johnatan Kantarovsky ,  Yves Ngu

IPC: H01L29/40 ,  H01L29/735 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L29/407 ,  H01L29/735 ,  H01L29/0646 ,  H01L29/423 ,  H01L29/401

Abstract: Structures with an isolation region and fabrication methods for a structure having an isolation region. The structure includes a semiconductor substrate, a first isolation region surrounding a portion of the semiconductor substrate, a device in the portion of the semiconductor substrate, and a second isolation region surrounding the first isolation region and the portion of the semiconductor substrate.

公开(公告)号：US11054854B1

公开(公告)日：2021-07-06

申请号：US17032027

申请日：2020-09-25

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Sebastian T. Ventrone ,  Johnatan Kantarovsky

IPC: G06F1/08 ,  G06F21/75 ,  H03K3/84 ,  H03K3/037 ,  H03K5/01 ,  H03K5/00

Abstract: Embodiments of the disclosure provide systems and methods to operate a logic circuit with non-deterministic clock edge variations. A system may include a clock coupled to a logic circuit, the logic circuit having a set of source latches coupled to a set of capture latches through a set of logic cones. The clock includes a fixed clock component configured to generate a clock signal having a first clock edge, and a jitter clock component coupled to the fixed clock component and configured to modify the clock signal to have a second clock edge based on a non-deterministic value. The clock transmits the clock signal with the second clock edge to drive the set of source latches and the set of capture latches of the logic circuit. A clock controller coupled to the jitter clock component generates the non-deterministic value.

公开(公告)号：US12159910B2

公开(公告)日：2024-12-03

申请号：US17671879

申请日：2022-02-15

Applicant: GlobalFoundries U.S. Inc.

Inventor： Uppili Raghunathan ,  Vibhor Jain ,  Sebastian Ventrone ,  Johnatan Kantarovsky ,  Yves Ngu

IPC: H01L29/40 ,  H01L29/06 ,  H01L29/423 ,  H01L29/735

Abstract: Structures with an isolation region and fabrication methods for a structure having an isolation region. The structure includes a semiconductor substrate, a first isolation region surrounding a portion of the semiconductor substrate, a device in the portion of the semiconductor substrate, and a second isolation region surrounding the first isolation region and the portion of the semiconductor substrate.