公开(公告)号：US20240028811A1

公开(公告)日：2024-01-25

申请号：US17813344

申请日：2022-07-19

申请人： GlobalFoundries U.S. Inc.

发明人： Alain F. Loiseau ,  Romain H.A. Feuillette ,  Mujahid Muhammad

IPC分类号： G06F30/398 ,  G06F30/392

CPC分类号： G06F30/398 ,  G06F30/392

摘要： A process design kit (PDK) is supplied to a layout design tool. The PDK includes parameterized cells (Pcells) adapted to cause the layout design tool to automatically add labels to device layouts in the graphic design system (GDS) file that is being created by the layout design tool. Each corresponding label lists parameters used when creating the corresponding device layout. The GDS file is receive back from the layout design tool. The parameters from the labels is applied to corresponding ones of the Pcells within the PDK to create a device verification layout for each of the device layouts in the GDS file. Each of the device layouts in the GDS file is compared to a corresponding device verification layout. The device layouts within the GDS file that fail to match the corresponding device verification layout are thereby identified.