公开(公告)号：US20240347638A1

公开(公告)日：2024-10-17

申请号：US18301382

申请日：2023-04-17

申请人： GlobalFoundries U.S. Inc.

发明人： Navneet K. Jain ,  David Charles Pritchard ,  Romain H.A. Feuillette ,  James P. Mazza ,  Hong Yu

IPC分类号： H01L29/78 ,  H01L21/28 ,  H01L29/10 ,  H01L29/49 ,  H01L29/66

CPC分类号： H01L29/7851 ,  H01L21/28123 ,  H01L29/1037 ,  H01L29/4983 ,  H01L29/66545 ,  H01L29/66795

摘要： Disclosed are a structure including a fin-type field effect transistor (FINFET) and a method. The FINFET includes first and second fins. An isolation structure is adjacent the outer sidewall of the first fin at a channel region and, optionally, fills a groove in the outer sidewall so the fin width is reduced. A gate is adjacent the inner sidewall of the first fin at the channel region and extends over the first fin to the isolation structure. The gate is further adjacent an inner sidewall and top of the second fin at a channel region. In some embodiments, a second isolation structure is adjacent an outer sidewall of the second fin at the channel region and, optionally, fills a groove in the outer sidewall so the fin width is reduced. In this case, the gate extends over the second fin to the second isolation structure.

公开(公告)号：US20240028811A1

公开(公告)日：2024-01-25

申请号：US17813344

申请日：2022-07-19

申请人： GlobalFoundries U.S. Inc.

发明人： Alain F. Loiseau ,  Romain H.A. Feuillette ,  Mujahid Muhammad

IPC分类号： G06F30/398 ,  G06F30/392

CPC分类号： G06F30/398 ,  G06F30/392

摘要： A process design kit (PDK) is supplied to a layout design tool. The PDK includes parameterized cells (Pcells) adapted to cause the layout design tool to automatically add labels to device layouts in the graphic design system (GDS) file that is being created by the layout design tool. Each corresponding label lists parameters used when creating the corresponding device layout. The GDS file is receive back from the layout design tool. The parameters from the labels is applied to corresponding ones of the Pcells within the PDK to create a device verification layout for each of the device layouts in the GDS file. Each of the device layouts in the GDS file is compared to a corresponding device verification layout. The device layouts within the GDS file that fail to match the corresponding device verification layout are thereby identified.

公开(公告)号：US20220268805A1

公开(公告)日：2022-08-25

申请号：US17183432

申请日：2021-02-24

申请人： GLOBALFOUNDRIES U.S. Inc.

发明人： Romain H.A. Feuillette ,  David C. Pritchard ,  Elizabeth Strehlow ,  James P. Mazza

IPC分类号： G01P15/00

摘要： Disclosed are a motion-sensitive field effect transistor (MSFET), a motion detection system, and a method. The MSFET includes a gate structure with a reservoir containing conductive fluid and gate electrode(s). Given position(s) of the gate electrode(s) and a fill level of the fluid within the reservoir, contact between the gate electrode(s) and the fluid depends upon the orientation the MSFET channel region relative to the top surface of the conductive fluid and the orientation of the MSFET channel region relative to the top surface of the conductive fluid depends upon position in space and/or movement of the MSFET and, particularly, position in space and/or movement of the chip on which the MSFET is formed. An electrical property of the MSFET in response to specific bias conditions varies depending on whether or not or to what extent the gate electrode(s) contact the fluid and is, thus, measurable for sensing chip motion.