公开(公告)号：US10684970B1

公开(公告)日：2020-06-16

申请号：US15921795

申请日：2018-03-15

Applicant: Google LLC

Inventor： Benjamin C. Serebrin ,  Michael R. Marty ,  Paul Jack Turner

IPC: G06F13/24 ,  G06F9/48 ,  G06F9/38 ,  G06F9/50 ,  G06F9/32

Abstract: A method includes for each processed interrupt: identifying an interrupt associated with a first interrupt number; determining that the interrupt is designated as a special interrupt, the special interrupt being an interrupt to be translated to a different interrupt number only if the hardware processor is in user mode; determining a current execution mode for the hardware processor; for each interrupt in operating system mode, delivering the interrupt as the first interrupt number; and for each interrupt in user mode: translating the first interrupt number to a second interrupt number; and delivering the interrupt as the second interrupt number, wherein the current execution mode is determined to be an operating system mode for at least one of the interrupts, and the current execution mode is determined to be a user mode for at least an additional one of the interrupts.

公开(公告)号：US09965413B1

公开(公告)日：2018-05-08

申请号：US15454654

申请日：2017-03-09

Applicant: Google LLC

Inventor： Benjamin C. Serebrin ,  Michael R. Marty ,  Paul Jack Turner

IPC: G06F13/24 ,  G06F9/48 ,  G06F9/32 ,  G06F9/50 ,  G06F9/38

CPC classification number: G06F13/24 ,  G06F9/327 ,  G06F9/3857 ,  G06F9/4812 ,  G06F9/5027

Abstract: A method includes for each processed interrupt: identifying an interrupt associated with a first interrupt number; determining that the interrupt is designated as a special interrupt, the special interrupt being an interrupt to be translated to a different interrupt number only if the hardware processor is in user mode; determining a current execution mode for the hardware processor; for each interrupt in operating system mode, delivering the interrupt as the first interrupt number; and for each interrupt in user mode: translating the first interrupt number to a second interrupt number; and delivering the interrupt as the second interrupt number, wherein the current execution mode is determined to be an operating system mode for at least one of the interrupts, and the current execution mode is determined to be a user mode for at least an additional one of the interrupts.