Generating a full rail signal
    2.
    发明授权
    Generating a full rail signal 有权
    产生完整的轨道信号

    公开(公告)号:US08193849B2

    公开(公告)日:2012-06-05

    申请号:US13180193

    申请日:2011-07-11

    申请人: Greg King

    发明人: Greg King

    IPC分类号: H03K5/00

    摘要: Apparatus, systems, and methods are disclosed, such as those that comprise a center-swing signal generator that includes a push-pull center-swing driver coupled to a common-mode pre-emphasis module, the center-swing signal generator to receive a low swing current mode logic (CML) signal and output a center-swing signal, and a full-swing cross-coupled inverter coupled to the center-swing signal generator, the full-swing cross-coupled inverter to receive the center-swing signal and output a full-rail single-ended swing signal. Additional apparatus, systems, and methods are disclosed.

    摘要翻译: 公开了装置,系统和方法,例如包括中心摆动信号发生器的装置,系统和方法,其包括耦合到共模预加重模块的推挽中心摆动驱动器,中心摆动信号发生器接收 低回波电流模式逻辑(CML)信号并输出​​中心摆动信号,以及与中心摆动信号发生器耦合的全摆幅交叉耦合反相器,全摆幅交叉耦合逆变器接收中心摆动信号 并输出全轨单端回转信号。 公开了附加装置,系统和方法。

    Data serializer apparatus and methods
    3.
    发明授权
    Data serializer apparatus and methods 有权
    数据串行器设备和方法

    公开(公告)号:US08094047B2

    公开(公告)日:2012-01-10

    申请号:US12556750

    申请日:2009-09-10

    申请人: Greg King

    发明人: Greg King

    IPC分类号: H03M9/00

    CPC分类号: H03M9/00

    摘要: Some embodiments include apparatus and methods having an output line, clock nodes to receive clock signals, the clock signals being out of phase with each other, and selector circuits to receive data in parallel. In at least one embodiment, the selector circuits are responsive to the clock signals to transfer the data serially to the output line. Such apparatus and methods can also include a control unit to influence a portion of a signal that represents at least a portion of the data at the output line. Additional apparatus and methods are described.

    摘要翻译: 一些实施例包括具有输出线的装置和方法,用于接收时钟信号的时钟节点,彼此不同相的时钟信号,以及并行接收数据的选择器电路。 在至少一个实施例中,选择器电路响应时钟信号将数据串行地传送到输出线。 这种装置和方法还可以包括控制单元,以影响表示输出线上数据的至少一部分的信号的一部分。 描述附加的装置和方法。

    GENERATING A FULL RAIL SIGNAL
    4.
    发明申请
    GENERATING A FULL RAIL SIGNAL 有权
    产生一个完整的铁路信号

    公开(公告)号:US20110267129A1

    公开(公告)日:2011-11-03

    申请号:US13180193

    申请日:2011-07-11

    申请人: Greg King

    发明人: Greg King

    IPC分类号: H03L5/00

    摘要: Apparatus, systems, and methods are disclosed, such as those that comprise a center-swing signal generator that includes a push-pull center-swing driver coupled to a common-mode pre-emphasis module, the center-swing signal generator to receive a low swing current mode logic (CML) signal and output a center-swing signal, and a full-swing cross-coupled inverter coupled to the center-swing signal generator, the full-swing cross-coupled inverter to receive the center-swing signal and output a full-rail single-ended swing signal. Additional apparatus, systems, and methods are disclosed.

    摘要翻译: 公开了装置,系统和方法,例如包括中心摆动信号发生器的装置,系统和方法,其包括耦合到共模预加重模块的推挽中心摆动驱动器,中心摆动信号发生器接收 低回波电流模式逻辑(CML)信号并输出​​中心摆动信号,以及与中心摆动信号发生器耦合的全摆幅交叉耦合反相器,全摆幅交叉耦合逆变器接收中心摆动信号 并输出全轨单端回转信号。 公开了附加装置,系统和方法。

    Method and system for generating reference voltages for signal receivers
    5.
    发明授权
    Method and system for generating reference voltages for signal receivers 有权
    用于产生信号接收机参考电压的方法和系统

    公开(公告)号:US07577212B2

    公开(公告)日:2009-08-18

    申请号:US10930543

    申请日:2004-08-30

    IPC分类号: H03K9/00

    CPC分类号: H04L25/062

    摘要: A method and system for generating a reference voltage for memory device signal receivers operates in either a calibration mode or a normal operating mode. In the calibration mode, the magnitude of the reference voltage is incrementally varied, and a digital signal pattern is coupled to the receiver at each reference voltage. An output of the receiver is analyzed to determine if the receiver can accurately pass the signal pattern at each reference voltage level. A range of reference voltages that allow the receiver to accurately pass the signal pattern is recorded, and a final reference voltage is calculated at the approximate midpoint of the range. This final reference voltage is applied to the receiver during normal operation.

    摘要翻译: 用于产生用于存储器件信号接收器的参考电压的方法和系统以校准模式或正常操作模式工作。 在校准模式下,参考电压的幅度逐渐变化,并且数字信号图案在每个参考电压下耦合到接收器。 分析接收机的输出以确定接收机是否可以在每个参考电压电平下准确地传递信号模式。 记录允许接收器精确地通过信号图案的参考电压范围,并且在该范围的大致中点处计算最终参考电压。 在正常操作期间将该最终参考电压施加到接收器。

    Azo compounds and coating compositions containing the azo compounds
    6.
    发明申请
    Azo compounds and coating compositions containing the azo compounds 审中-公开
    偶氮化合物和含有偶氮化合物的涂料组合物

    公开(公告)号:US20070207331A1

    公开(公告)日:2007-09-06

    申请号:US11368580

    申请日:2006-03-06

    摘要: Disclosed are azo colorant compounds containing one or more ethylenically-unsaturated groups polymerizable or copolymerizable with ethylenically-unsaturated compositions typically used in coating compositions. The azo colorantcompounds are polymerizable by photopolymerization or free radical polymerization techniques with ethylenically-unsaturated monomers. The copolymerized colorants produce colored compositions such as colored acrylic polymers, e.g., polymers produced from acrylate and methacrylate esters, colored polystyrenes, and similar colored polymeric materials derived from other ethylenically-unsaturated monomers. The ethylenically-unsaturated colorant compounds may be used in coatings that are applied to wood, glass, metal, thermoplastics and the like.

    摘要翻译: 公开了含有一种或多种烯键式不饱和基团的偶氮着色剂化合物,其可通过用于涂料组合物中的烯属不饱和组合物可聚合或可共聚。 偶氮着色剂化合物可通过光聚合或自由基聚合技术与烯键式不饱和单体聚合。 共聚的着色剂产生着色的组合物,例如着色的丙烯酸聚合物,例如由丙烯酸酯和甲基丙烯酸酯制得的聚合物,着色的聚苯乙烯和衍生自其它烯属不饱和单体的类似的有色聚合物。 烯键式不饱和着色剂化合物可用于施加到木材,玻璃,金属,热塑性塑料等的涂料中。

    Flush valve and vacuum generator for vacuum waste system
    7.
    发明授权
    Flush valve and vacuum generator for vacuum waste system 有权
    用于真空废物系统的冲洗阀和真空发生器

    公开(公告)号:US08607370B2

    公开(公告)日:2013-12-17

    申请号:US12571545

    申请日:2009-10-01

    CPC分类号: E03F1/006

    摘要: The apparatus and method of the invention provides for a flush valve for controlling the vacuum evacuation of waste from a receptacle. The flush valve comprises an inlet port for receiving the waste from the receptacle, an outlet port opposite the inlet port and in fluid communication therewith, a source of vacuum connected to the outlet port and a uniquely designed discharge disk disposed between the inlet and outlet ports for interrupting the flow of fluid therebetween. In the preferred embodiment the flush valve is integral with a latticed panel of the waste receptacle stand.

    摘要翻译: 本发明的装置和方法提供了一种用于控制来自容器的废物的真空排气的冲洗阀。 冲洗阀包括用于从容器接收废物的入口端口,与入口端口相对并与其流体连通的出口端口,连接到出口的真空源和设置在入口和出口之间的独特设计的排放盘 用于中断流体之间的流动。 在优选实施例中,冲洗阀与废物容器支架的网格板组成一体。

    Generating a full rail signal
    8.
    发明授权
    Generating a full rail signal 有权
    产生完整的轨道信号

    公开(公告)号:US07977997B2

    公开(公告)日:2011-07-12

    申请号:US12346564

    申请日:2008-12-30

    申请人: Greg King

    发明人: Greg King

    IPC分类号: H03L5/00

    摘要: Apparatus, systems, and methods are disclosed, such as those that comprise a center-swing signal generator that includes a push-pull center-swing driver coupled to a common-mode pre-emphasis module, the center-swing signal generator to receive a low swing current mode logic (CML) signal and output a center-swing signal, and a full-swing cross-coupled inverter coupled to the center-swing signal generator, the full-swing cross-coupled inverter to receive the center-swing signal and output a full-rail single-ended swing signal. Additional apparatus, systems, and methods are disclosed.

    摘要翻译: 公开了装置,系统和方法,例如包括中心摆动信号发生器的装置,系统和方法,其包括耦合到共模预加重模块的推挽中心摆动驱动器,中心摆动信号发生器接收 低回波电流模式逻辑(CML)信号并输出​​中心摆动信号,以及与中心摆动信号发生器耦合的全摆幅交叉耦合反相器,全摆幅交叉耦合逆变器接收中心摆动信号 并输出全轨单端回转信号。 公开了附加装置,系统和方法。

    ETHYLENICALLY-UNSATURATED BLUE ANTHRAQUINONE DYES
    9.
    发明申请
    ETHYLENICALLY-UNSATURATED BLUE ANTHRAQUINONE DYES 失效
    乙烯基不饱和蓝色染料

    公开(公告)号:US20060282960A1

    公开(公告)日:2006-12-21

    申请号:US11514446

    申请日:2006-08-31

    IPC分类号: D06P1/52

    CPC分类号: C09D4/00 C09B69/101

    摘要: This invention pertains to certain novel colorant compounds containing one or more ethylenically-unsaturated, photopolymerizable radicals that may be copolymerized (or cured) with ethylenically-unsaturated monomers to produce colored compositions such as colored acrylic polymers. Suitable compositions having the present colorants copolymerized therein include, e.g., polymers produced from acrylate and methacrylate esters, colored polystyrenes, and similar colored polymeric materials derived from other ethylenically-unsaturated monomers. The present invention also pertains to processes for preparing the photopolymerizable colorant compounds. The ethylenically unsaturated colorant compounds may be suitable for use in coatings that are applied to wood, glass, metal, thermoplastics and the like.

    摘要翻译: 本发明涉及含有一种或多种烯属不饱和光可聚合基团的某些新型着色剂化合物,其可以与烯属不饱和单体共聚(或固化)以产生着色组合物如着色丙烯酸聚合物。 其中共聚有本发明着色剂的合适的组合物包括例如由丙烯酸酯和甲基丙烯酸酯衍生的聚合物,着色聚苯乙烯以及衍生自其它烯属不饱和单体的类似有色聚合物。 本发明还涉及制备可光聚合着色剂化合物的方法。 烯属不饱和着色剂化合物可适用于施用于木材,玻璃,金属,热塑性塑料等的涂料中。

    Tri-state driver circuits having automatic high-impedance enabling
    10.
    发明授权
    Tri-state driver circuits having automatic high-impedance enabling 有权
    具有自动高阻抗功能的三态驱动电路

    公开(公告)号:US08750014B2

    公开(公告)日:2014-06-10

    申请号:US13467676

    申请日:2012-05-09

    申请人: Greg King

    发明人: Greg King

    IPC分类号: H03K3/00 G11C7/10

    摘要: Memories, driver circuits, and methods for generating an output signal in response to an input signal. One such driver circuit includes an input stage and an output stage. The input stage receives the input signal and provides a delayed input signal having a delay relative to the input signal. The output stage receives the delayed input signal and further receives the complement of the input signal. The output stage couples an output node to a first voltage in response to a complement of the input signal having a first logic level and couples the output to a second voltage in response to the complement of the input signal having a second logic level. The output stage further decouples the output from the first or second voltage in response to receiving the delayed input signal to provide a high-impedance at the output node.

    摘要翻译: 存储器,驱动器电路和用于响应于输入信号产生输出信号的方法。 一个这样的驱动器电路包括输入级和输出级。 输入级接收输入信号并提供相对于输入信号具有延迟的延迟输入信号。 输出级接收延迟的输入信号,并进一步接收输入信号的补码。 响应于具有第一逻辑电平的输入信号的补码,输出级将输出节点耦合到第一电压,并且响应于具有第二逻辑电平的输入信号的补码将输出耦合到第二电压。 响应于接收延迟的输入信号,输出级进一步使输出与第一或第二电压分离,以在输出节点处提供高阻抗。