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1.发明申请IMAGE SENSOR DATA FORMATS AND MEMORY ADDRESSING TECHNIQUES FOR IMAGE SIGNAL PROCESSING 有权用于图像信号处理的图像传感器数据格式和存储器寻址技术公开(公告)号：US20120081577A1
公开(公告)日：2012-04-05
申请号：US12895346
申请日：2010-09-30
IPC分类号： H04N5/76
CPC分类号： H04N5/772 , H04N5/23229 , H04N5/23235 , H04N5/2354 , H04N5/3572 , H04N5/367 , H04N9/045 , H04N9/735 , H04N19/80
摘要： Certain embodiments of the present disclosure provide a flexible memory input/output controller that is configured to the storing and reading of multiple types of pixels and pixel memory formats. For instance, the memory I/O controller may support the storing and reading of raw image pixels at various bits of precision, such as 8-bit, 10-bit, 12-bit, 14-bit, and 16-bit. Pixel formats that are unaligned with memory bytes (e.g., not being a multiple of 8-bits) may be stored in a packed manner. The memory I/O controller may also support various formats of RGB pixel sets and YCC pixel sets.
摘要翻译： 本公开的某些实施例提供了一种灵活的存储器输入/输出控制器，其被配置为存储和读取多种类型的像素和像素存储器格式。 例如，存储器I / O控制器可以支持以各种精度位（例如8位，10位，12位，14位和16位）存储和读取原始图像像素。 与存储器字节不对齐的像素格式（例如，不是8位的倍数）可以以打包的方式存储。 存储器I / O控制器还可以支持RGB像素集和YCC像素集的各种格式。
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2.发明授权Image sensor data formats and memory addressing techniques for image signal processing 有权用于图像信号处理的图像传感器数据格式和存储器寻址技术公开(公告)号：US08508621B2
公开(公告)日：2013-08-13
申请号：US12895346
申请日：2010-09-30
IPC分类号： H04N5/76
CPC分类号： H04N5/772 , H04N5/23229 , H04N5/23235 , H04N5/2354 , H04N5/3572 , H04N5/367 , H04N9/045 , H04N9/735 , H04N19/80
摘要： Certain embodiments of the present disclosure provide a flexible memory input/output controller that is configured to the storing and reading of multiple types of pixels and pixel memory formats. For instance, the memory I/O controller may support the storing and reading of raw image pixels at various bits of precision, such as 8-bit, 10-bit, 12-bit, 14-bit, and 16-bit. Pixel formats that are unaligned with memory bytes (e.g., not being a multiple of 8-bits) may be stored in a packed manner. The memory I/O controller may also support various formats of RGB pixel sets and YCC pixel sets.
摘要翻译： 本公开的某些实施例提供了一种灵活的存储器输入/输出控制器，其被配置为存储和读取多种类型的像素和像素存储器格式。 例如，存储器I / O控制器可以支持以各种精度位（例如8位，10位，12位，14位和16位）存储和读取原始图像像素。 与存储器字节不对齐的像素格式（例如，不是8位的倍数）可以以打包的方式存储。 存储器I / O控制器还可以支持RGB像素集和YCC像素集的各种格式。
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3.发明授权Image signal processor line buffer configuration for processing ram image data 有权用于处理原始图像数据的图像信号处理器线缓冲器配置公开(公告)号：US08508612B2
公开(公告)日：2013-08-13
申请号：US12895396
申请日：2010-09-30
IPC分类号： H04N5/228
CPC分类号： H04N9/045 , G06T3/4015
摘要： The present disclosure provides techniques relates to the implementation of a raw pixel processing unit using a set of line buffers. In one embodiment, the set of line buffers may include a first subset and second subset. Various logical units of the raw pixel processing unit may be implemented using the first and second subsets of line buffers in a shared manner. For instance, in one embodiment, defective pixel correction and detection logic may be implemented using the first subset of line buffers. The second subset of line buffers may be used to implement lens shading correction logic, gain, offset, and clamping logic, and demosaicing logic. Further, noise reduction may also be implemented using at least a portion of each of the first and second subsets of line buffers.
摘要翻译： 本公开提供了技术涉及使用一组行缓冲器的原始像素处理单元的实现。 在一个实施例中，行缓冲器组可以包括第一子集和第二子集。 可以以共享的方式使用第一和第二子行的行缓冲器来实现原始像素处理单元的各种逻辑单元。 例如，在一个实施例中，可以使用线缓冲器的第一子集来实现有缺陷的像素校正和检测逻辑。 行缓冲器的第二子集可用于实现镜头阴影校正逻辑，增益，偏移和钳位逻辑以及去马赛克逻辑。 此外，还可以使用行缓冲器的第一和第二子集中的每一个的至少一部分来实现噪声降低。
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公开(公告)号：US20120044372A1
公开(公告)日：2012-02-23
申请号：US12858922
申请日：2010-08-18
CPC分类号： H04N5/232 , H04N5/2258 , H04N5/23245
摘要： Various techniques are provided for processing image data acquired using a digital image sensor. In accordance with aspects of the present disclosure, one such technique may relate to the processing of image data in a system that supports multiple image sensors. In one embodiment, the image processing system may include control circuitry configured to determine whether a device is operating in a single sensor mode (one active sensor) or a dual sensor mode (two active sensors). When operating in the single sensor mode, data may be provided directly to a front-end pixel processing unit from the sensor interface of the active sensor. When operating in a dual sensor mode, the image frames from the first and second sensors are provided to the front-end pixel processing unit in an interleaved manner. For instance, in one embodiment, the image frames from the first and second sensors are written to a memory, and then read out to the front-end pixel processing unit in an interleaved manner.
摘要翻译： 提供了用于处理使用数字图像传感器获取的图像数据的各种技术。 根据本公开的方面，一种这样的技术可以涉及在支持多个图像传感器的系统中对图像数据的处理。 在一个实施例中，图像处理系统可以包括被配置为确定设备是以单个传感器模式（一个有源传感器）或双传感器模式（两个有源传感器）操作的控制电路。 当在单传感器模式下操作时，数据可以从有源传感器的传感器接口直接提供给前端像素处理单元。 当以双传感器模式操作时，来自第一和第二传感器的图像帧以交错的方式提供给前端像素处理单元。 例如，在一个实施例中，来自第一和第二传感器的图像帧被写入存储器，然后以交错的方式读出到前端像素处理单元。
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5.发明申请IMAGE SIGNAL PROCESSOR LINE BUFFER CONFIGURATION FOR PROCESSING RAW IMAGE DATA 有权用于处理RAW图像数据的图像信号处理器线缓冲器配置公开(公告)号：US20120081578A1
公开(公告)日：2012-04-05
申请号：US12895396
申请日：2010-09-30
IPC分类号： H04N5/225
CPC分类号： H04N9/045 , G06T3/4015
摘要： The present disclosure provides techniques relates to the implementation of a raw pixel processing unit using a set of line buffers. In one embodiment, the set of line buffers may include a first subset and second subset. Various logical units of the raw pixel processing unit may be implemented using the first and second subsets of line buffers in a shared manner. For instance, in one embodiment, defective pixel correction and detection logic may be implemented using the first subset of line buffers. The second subset of line buffers may be used to implement lens shading correction logic, gain, offset, and clamping logic, and demosaicing logic. Further, noise reduction may also be implemented using at least a portion of each of the first and second subsets of line buffers.
摘要翻译： 本公开提供了技术涉及使用一组行缓冲器的原始像素处理单元的实现。 在一个实施例中，行缓冲器组可以包括第一子集和第二子集。 可以以共享的方式使用第一和第二子行的行缓冲器来实现原始像素处理单元的各种逻辑单元。 例如，在一个实施例中，可以使用线缓冲器的第一子集来实现有缺陷的像素校正和检测逻辑。 行缓冲器的第二子集可用于实现镜头阴影校正逻辑，增益，偏移和钳位逻辑以及去马赛克逻辑。 此外，还可以使用行缓冲器的第一和第二子集中的每一个的至少一部分来实现噪声降低。
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公开(公告)号：US08525895B2
公开(公告)日：2013-09-03
申请号：US12846008
申请日：2010-07-29
CPC分类号： G06T3/4015
摘要： Various techniques for applying binning compensation filtering to binned raw image data acquired by an image sensor are provided. In one embodiment, a binning compensation filter (BCF) includes separate digital differential analyzers (DDA) for vertical and horizontal scaling. A current position of an output pixel is determined by incrementing the DDA based upon a step size. Using the known output pixel position, a center source input pixel and an index corresponding to the between-pixel fractional position of the output pixel position relative to the input pixels may be selected for filtering. Using the selected center input pixel, one or more same-colored neighboring source pixels may be selected. The number of selected source pixels may depend on the number of taps used by the scaling logic, and may depend on whether horizontal or vertical scaling is being applied. Using the selected index, a set of filter coefficients may be selected from a filter coefficient lookup table, applied to the selected source pixels, and the results may be summed to determine a value for an output pixel having a position corresponding to the current position of the DDA. This process may be repeated for each input pixel and may be performed in both vertical and horizontal directions, thus ultimately producing a re-sampled set of image data that is spatially evenly distributed.
摘要翻译： 提供了用于将分档补偿滤波应用于由图像传感器获取的二进制原始图像数据的各种技术。 在一个实施例中，分箱补偿滤波器（BCF）包括用于垂直和水平缩放的单独的数字差分分析器（DDA）。 通过基于步长增加DDA来确定输出像素的当前位置。 使用已知的输出像素位置，可以选择中心源输入像素和对应于输出像素位置相对于输入像素的像素间分数位置的索引用于滤波。 使用所选择的中心输入像素，可以选择一个或多个相同颜色的相邻源像素。 选择的源像素的数量可以取决于缩放逻辑使用的抽头的数量，并且可以取决于是否应用水平或垂直缩放。 使用所选择的索引，可以从应用于所选择的源像素的滤波器系数查找表中选择一组滤波器系数，并且将结果相加以确定具有对应于当前位置的位置的输出像素的值 DDA。 对于每个输入像素可以重复该过程，并且可以在垂直和水平方向上执行该过程，从而最终产生在空间上均匀分布的重新采样的图像数据集。
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7.发明申请公开(公告)号：US20120026368A1
公开(公告)日：2012-02-02
申请号：US12846008
申请日：2010-07-29
IPC分类号： H04N9/64
CPC分类号： G06T3/4015
摘要： Various techniques for applying binning compensation filtering to binned raw image data acquired by an image sensor are provided. In one embodiment, a binning compensation filter (BCF) includes separate digital differential analyzers (DDA) for vertical and horizontal scaling. A current position of an output pixel is determined by incrementing the DDA based upon a step size. Using the known output pixel position, a center source input pixel and an index corresponding to the between-pixel fractional position of the output pixel position relative to the input pixels may be selected for filtering. Using the selected center input pixel, one or more same-colored neighboring source pixels may be selected. The number of selected source pixels may depend on the number of taps used by the scaling logic, and may depend on whether horizontal or vertical scaling is being applied. Using the selected index, a set of filter coefficients may be selected from a filter coefficient lookup table, applied to the selected source pixels, and the results may be summed to determine a value for an output pixel having a position corresponding to the current position of the DDA. This process may be repeated for each input pixel and may be performed in both vertical and horizontal directions, thus ultimately producing a re-sampled set of image data that is spatially evenly distributed.
摘要翻译： 提供了用于将分档补偿滤波应用于由图像传感器获取的二进制原始图像数据的各种技术。 在一个实施例中，分箱补偿滤波器（BCF）包括用于垂直和水平缩放的单独的数字差分分析器（DDA）。 通过基于步长增加DDA来确定输出像素的当前位置。 使用已知的输出像素位置，可以选择中心源输入像素和对应于输出像素位置相对于输入像素的像素间分数位置的索引用于滤波。 使用所选择的中心输入像素，可以选择一个或多个相同颜色的相邻源像素。 选择的源像素的数量可以取决于缩放逻辑使用的抽头的数量，并且可以取决于是否应用水平或垂直缩放。 使用所选择的索引，可以从应用于所选择的源像素的滤波器系数查找表中选择一组滤波器系数，并且将结果相加以确定具有对应于当前位置的位置的输出像素的值 DDA。 对于每个输入像素可以重复该过程，并且可以在垂直和水平方向上执行该过程，从而最终产生在空间上均匀分布的重新采样的图像数据集。
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公开(公告)号：US08493482B2
公开(公告)日：2013-07-23
申请号：US12858922
申请日：2010-08-18
IPC分类号： H04N3/14 , H04N5/335 , H01L31/062
CPC分类号： H04N5/232 , H04N5/2258 , H04N5/23245
摘要： Various techniques are provided for processing image data acquired using a digital image sensor. In accordance with aspects of the present disclosure, one such technique may relate to the processing of image data in a system that supports multiple image sensors. In one embodiment, the image processing system may include control circuitry configured to determine whether a device is operating in a single sensor mode (one active sensor) or a dual sensor mode (two active sensors). When operating in the single sensor mode, data may be provided directly to a front-end pixel processing unit from the sensor interface of the active sensor. When operating in a dual sensor mode, the image frames from the first and second sensors are provided to the front-end pixel processing unit in an interleaved manner. For instance, in one embodiment, the image frames from the first and second sensors are written to a memory, and then read out to the front-end pixel processing unit in an interleaved manner.
摘要翻译： 提供了用于处理使用数字图像传感器获取的图像数据的各种技术。 根据本公开的方面，一种这样的技术可以涉及在支持多个图像传感器的系统中对图像数据的处理。 在一个实施例中，图像处理系统可以包括被配置为确定设备是以单个传感器模式（一个有源传感器）或双传感器模式（两个有源传感器）操作的控制电路。 当在单传感器模式下操作时，数据可以从有源传感器的传感器接口直接提供给前端像素处理单元。 当以双传感器模式操作时，来自第一和第二传感器的图像帧以交错的方式提供给前端像素处理单元。 例如，在一个实施例中，来自第一和第二传感器的图像帧被写入存储器，然后以交错的方式读出到前端像素处理单元。
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公开(公告)号：US20120081566A1
公开(公告)日：2012-04-05
申请号：US12895093
申请日：2010-09-30
申请人： Guy Côté , Jeffrey E. Frederiksen
发明人： Guy Côté , Jeffrey E. Frederiksen
IPC分类号： H04N5/228
CPC分类号： H04N5/2256 , H04N5/225 , H04N5/228 , H04N5/2354
摘要： Certain aspects of this disclosure relate to an image signal processing system that includes a flash controller that is configured to activate a flash device prior to the start of a target image frame by using a sensor timing signal. In one embodiment, the flash controller receives a delayed sensor timing signal and determines a flash activation start time by using the delayed sensor timing signal to identify a time corresponding to the end of the previous frame, increasing that time by a vertical blanking time, and then subtracting a first offset to compensate for delay between the sensor timing signal and the delayed sensor timing signal. Then, the flash controller subtracts a second offset to determine the flash activation time, thus ensuring that the flash is activated prior to receiving the first pixel of the target frame.
摘要翻译： 本公开的某些方面涉及一种图像信号处理系统，其包括闪存控制器，其被配置为通过使用传感器定时信号来在目标图像帧开始之前激活闪存设备。 在一个实施例中，闪光灯控制器接收延迟的传感器定时信号，并通过使用延迟的传感器定时信号来确定闪光激活开始时间，以识别对应于先前帧的结束的时间，通过垂直消隐时间增加该时间，以及 然后减去第一偏移量来补偿传感器定时信号和延迟的传感器定时信号之间的延迟。 然后，闪存控制器减去第二偏移量以确定闪光激活时间，从而确保在接收到目标帧的第一像素之前闪光被激活。
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10.发明申请TECHNIQUES FOR ACQUIRING AND PROCESSING STATISTICS DATA IN AN IMAGE SIGNAL PROCESSOR 有权在图像信号处理器中获取和处理统计数据的技术公开(公告)号：US20120050567A1
公开(公告)日：2012-03-01
申请号：US12873999
申请日：2010-09-01
申请人： Guy Côté , Jeffrey E. Frederiksen
发明人： Guy Côté , Jeffrey E. Frederiksen
CPC分类号： H04N9/735 , H04N5/23212 , H04N5/2351 , H04N5/2357 , H04N5/347 , H04N5/3572 , H04N5/367 , H04N9/045 , H04N9/68
摘要： Various techniques are disclosed for processing statistics data in an image signal processor (ISP). In one embodiment, a statistics collection engine may be implemented in a front-end processing unit of the ISP, such that statistics are collected prior to processing by an ISP pipeline downstream from the front-end processing unit. In one embodiment, the statistics collection engine may be configured to acquire statistics relating to auto white-balance, auto-exposure, and auto-focus, as well as flicker detection. Collected statistics may be output to a memory and used by the ISP to process acquired image data.
摘要翻译： 公开了用于处理图像信号处理器（ISP）中的统计数据的各种技术。 在一个实施例中，可以在ISP的前端处理单元中实现统计收集引擎，使得在从前端处理单元下游的ISP管道处理之前收集统计信息。 在一个实施例中，统计收集引擎可以被配置为获取与自动白平衡，自动曝光和自动对焦以及闪烁检测有关的统计。 收集的统计信息可以被输出到存储器，并由ISP用来处理所获取的图像数据。
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