摘要:
A .SIGMA..DELTA. modulator-controlled, phase-locked-loop circuit, and an associated method, generates a frequency-regulated signal which does not exhibit undesired tones. Dithering signals are generated and are provided to a .SIGMA..DELTA. modulator. The .SIGMA..DELTA. modulator forms a division-factor control signal used to control the division factor of a frequency divider forming a portion of the PLL circuit. The dithering signals applied to the .SIGMA..DELTA. modulator reduce the likelihood that the .SIGMA..DELTA. modulator shall enter a limit cycle and generate repetitive output signals.
摘要:
An apparatus and method generate a linearly modulated signal in a polar modulation system. A signal for transmission is separated into a phase component and an amplitude component, and a carrier signal is modulated with the phase component in a phase modulator, creating a phase distortion. A compensator compensates for the phase distortion created by the phase modulator by modifying the amplitude component. The phase modulated carrier signal is amplitude modulated by the compensated amplitude component to produce a linearly modulated signal.